Cache coherence protocols: evaluation using a multiprocessor simulation model
ACM Transactions on Computer Systems (TOCS)
Memory access buffering in multiprocessors
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Efficient and correct execution of parallel programs that share memory
ACM Transactions on Programming Languages and Systems (TOPLAS)
An evaluation of directory schemes for cache coherence
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Asynchronous parallel successive overrelaxation for the symmetric linear complementarity problem
Mathematical Programming: Series A and B
Access ordering and coherence in shared memory multiprocessors
Access ordering and coherence in shared memory multiprocessors
Memory Access Dependencies in Shared-Memory Multiprocessors
IEEE Transactions on Software Engineering
Algorithms for scalable synchronization on shared-memory multiprocessors
ACM Transactions on Computer Systems (TOCS)
Performance evaluation of memory consistency models for shared-memory multiprocessors
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
Proving sequential consistency of high-performance shared memories (extended abstract)
SPAA '91 Proceedings of the third annual ACM symposium on Parallel algorithms and architectures
Detecting violations of sequential consistency
SPAA '91 Proceedings of the third annual ACM symposium on Parallel algorithms and architectures
Detecting data races on weak memory systems
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
The SPARC architecture manual: version 8
The SPARC architecture manual: version 8
Weak ordering—a new definition
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Memory consistency and event ordering in scalable shared-memory multiprocessors
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Lockup-free instruction fetch/prefetch cache organization
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Software versus hardware shared-memory implementation: a case study
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
LCM: memory system support for parallel language implementation
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
A checkpoint protocol for an entry consistent shared memory system
PODC '94 Proceedings of the thirteenth annual ACM symposium on Principles of distributed computing
A comprehensive bibliography of distributed shared memory
ACM SIGOPS Operating Systems Review
Lazy release consistency for hardware-coherent multiprocessors
Supercomputing '95 Proceedings of the 1995 ACM/IEEE conference on Supercomputing
An evaluation of memory consistency models for shared-memory systems with ILP processors
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Verification techniques for cache coherence protocols
ACM Computing Surveys (CSUR)
Performance debugging shared memory parallel programs using run-time dependence analysis
SIGMETRICS '97 Proceedings of the 1997 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Cashmere-2L: software coherent shared memory on a clustered remote-write network
Proceedings of the sixteenth ACM symposium on Operating systems principles
Commit-reconcile & fences (CRF): a new memory model for architects and compiler writers
ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture
Formal Automatic Verification of Cache Coherence in Multiprocessors with Relaxed Memory Models
IEEE Transactions on Parallel and Distributed Systems
Location Consistency-A New Memory Model and Cache Consistency Protocol
IEEE Transactions on Computers
A Protocol-Centric Approach to on-the-Fly Race Detection
IEEE Transactions on Parallel and Distributed Systems
Contention elimination by replication of sequential sections in distributed shared memory programs
PPoPP '01 Proceedings of the eighth ACM SIGPLAN symposium on Principles and practices of parallel programming
Reducing coherence overhead of barrier synchronization in software DSMs
SC '98 Proceedings of the 1998 ACM/IEEE conference on Supercomputing
Speculative synchronization: applying thread-level speculation to explicitly parallel applications
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Performance Analysis of Four Memory Consistency Models for Multithreaded Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Formal Verification of Delayed Consistency Protocols
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
InterWeave: A Middleware System for Distributed Shared State
LCR '00 Selected Papers from the 5th International Workshop on Languages, Compilers, and Run-Time Systems for Scalable Computers
The Efeect of Contention on the Scalability of Page-Based Software Shared Memory Systems
LCR '00 Selected Papers from the 5th International Workshop on Languages, Compilers, and Run-Time Systems for Scalable Computers
Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture
IEEE Transactions on Parallel and Distributed Systems
A Comparison of Entry Consistency and Lazy Release Consistency Implementations
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
A unified theory of shared memory consistency
Journal of the ACM (JACM)
A page-coherent, causally consistent protocol for distributed shared memory
Journal of Systems and Software
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Shared memory computing on clusters with symmetric multiprocessors and system area networks
ACM Transactions on Computer Systems (TOCS)
International Journal of Parallel Programming
What do high-level memory models mean for transactions?
Proceedings of the 2006 workshop on Memory system performance and correctness
Using fine grain multithreading for energy efficient computing
Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming
Message-driven relaxed consistency in a software distributed shared memory
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Software write detection for a distributed shared memory
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Implementing sequentially consistent programs on processor consistent platforms
Journal of Parallel and Distributed Computing
On Validity of Program Transformations in the Java Memory Model
ECOOP '08 Proceedings of the 22nd European conference on Object-Oriented Programming
x86-TSO: a rigorous and usable programmer's model for x86 multiprocessors
Communications of the ACM
Incorporation of OpenMP memory consistency into conventional dataflow analysis
IWOMP'08 Proceedings of the 4th international conference on OpenMP in a new era of parallelism
Formalising java's data race free guarantee
TPHOLs'07 Proceedings of the 20th international conference on Theorem proving in higher order logics
Reasoning about the implementation of concurrency abstractions on x86-TSO
ECOOP'10 Proceedings of the 24th European conference on Object-oriented programming
Euro-Par'10 Proceedings of the 16th international Euro-Par conference on Parallel processing: Part II
Verifying local transformations on relaxed memory models
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
Parameterized memory models and concurrent separation logic
ESOP'10 Proceedings of the 19th European conference on Programming Languages and Systems
Verification of the java causality requirements
HVC'05 Proceedings of the First Haifa international conference on Hardware and Software Verification and Testing
Data-race and concurrent-write freedom are undecidable
Computer Languages, Systems and Structures
Plan B: a buffered memory model for Java
POPL '13 Proceedings of the 40th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Checking and enforcing robustness against TSO
ESOP'13 Proceedings of the 22nd European conference on Programming Languages and Systems
Efficient deterministic multithreading without global barriers
Proceedings of the 19th ACM SIGPLAN symposium on Principles and practice of parallel programming
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The authors present a data-race-free-1, shared-memory model that unifies four earliermodels: weak ordering, release consistency (with sequentially consistent specialoperations), the VAX memory model, and data-race-free-0. Data-race-free-1 unifies themodels of weak ordering, release consistency, the VAX, and data-race-free-0 byformalizing the intuition that if programs synchronize explicitly and correctly, thensequential consistency can be guaranteed with high performance in a manner that retainsthe advantages of each of the four models. Data-race-free-1 expresses the programmer'sinterface more explicitly and formally than weak ordering and the VAX, and allows animplementation not allowed by weak ordering, release consistency, or data-race-free-0.The implementation proposal for data-race-free-1 differs from earlier implementations bypermitting the execution of all synchronization operations of a processor even whileprevious data operations of the processor are in progress. To ensure sequentialconsistency, two sychronizing processors exchange information to delay later operationsof the second processor that conflict with an incomplete data operation of the firstprocessor.