A class of compatible cache consistency protocols and their support by the IEEE futurebus
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Cache memory optimization to reduce processor/memory traffic
Advances in VLSI and Computer Systems
Implementing a cache consistency protocol
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
ACM Computing Surveys (CSUR)
Using cache memory to reduce processor-memory traffic
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
Dynamic decentralized cache schemes for mimd parallel processors
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
A low-overhead coherence solution for multiprocessors with private cache memories
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
An economical solution to the cache coherence problem
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
An architectural perspective on a memory access controller
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Correct memory operation of cache-based multiprocessors
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Firefly: a multiprocessor workstation
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
The Leopard workstation project
ACM SIGARCH Computer Architecture News
Communications of the ACM
Throughput Analysis of Cache-Based Multiprocessors with Multiple Buses
IEEE Transactions on Computers
Firefly: A Multiprocessor Workstation
IEEE Transactions on Computers - Special issue on architectural support for programming languages and operating systems
On the inclusion properties for multi-level cache hierarchies
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Analysis of bus hierarchies for multiprocessors
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
An evaluation of directory schemes for cache coherence
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
A cache coherence approach for large multiprocessor systems
ICS '88 Proceedings of the 2nd international conference on Supercomputing
Efficient (stack) algorithms for analysis of write-back and sector memories
ACM Transactions on Computer Systems (TOCS)
Tokenless static data flow using associative templates
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
Efficient synchronization primitives for large-scale cache-coherent multiprocessors
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
Evaluating the performance of software cache coherence
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
The effect of sharing on the cache and bus performance of parallel programs
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
Evaluating the performance of four snooping cache coherency protocols
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Design and performance of a coherent cache for parallel logic programming architectures
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Multiple vs. wide shared bus multiprocessors
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
A cache consistency protocol for multiprocessors with multistage networks
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
The performance implications of thread management alternatives for shared-memory multiprocessors
SIGMETRICS '89 Proceedings of the 1989 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Analysis and Comparison of Cache Coherence Protocols for a Packet-Switched Multiprocessor
IEEE Transactions on Computers
C2MP: a cache-coherent, distributed memory multiprocessor-system
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
The Performance Implications of Thread Management Alternatives for Shared-Memory Multiprocessors
IEEE Transactions on Computers
Cache considerations for multiprocessor programmers
Communications of the ACM
Cache coherence for large scale shared memory multiprocessors
SPAA '90 Proceedings of the second annual ACM symposium on Parallel algorithms and architectures
Shared Block Contention in a Cache Coherence Protocol
IEEE Transactions on Computers
SIGMETRICS '91 Proceedings of the 1991 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Architectural primitives for a scalable shared memory multiprocessor
SPAA '91 Proceedings of the third annual ACM symposium on Parallel algorithms and architectures
Data caching tradeoffs in client-server DBMS architectures
SIGMOD '91 Proceedings of the 1991 ACM SIGMOD international conference on Management of data
Comparative evaluation of latency reducing and tolerating techniques
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Comparison of hardware and software cache coherence schemes
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Cache coherence for large scale shared memory multiprocessors
ACM SIGARCH Computer Architecture News - Symposium on parallel algorithms and architectures
Simplicity Versus Accuracy in a Model of Cache Coherency Overhead
IEEE Transactions on Computers
Design and Analysis of Master/Slave Multiprocessors
IEEE Transactions on Computers
An integrated memory management scheme for dynamic alias resolution
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
Comparison and analysis of software and directory coherence schemes
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
The Stanford Dash Multiprocessor
Computer
Evaluating Design Choices for Shared Bus Multiprocessors in a Throughput-Oriented Environment
IEEE Transactions on Computers
Analysis of directory based cache coherence schemes with multistage networks
CSC '92 Proceedings of the 1992 ACM annual conference on Communications
Design choices for the TOP-1 multiprocessor workstation
IBM Journal of Research and Development
Evaluation of the lock mechanism in a snooping cache
ICS '92 Proceedings of the 6th international conference on Supercomputing
A performance evaluation of optimal hybrid cache coherency protocols
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Mapping applications onto a cache coherent multiprocessor
Proceedings of the 1992 ACM/IEEE conference on Supercomputing
A scalable snoopy coherence scheme on distributed shared-memory multiprocessors
Proceedings of the 1992 ACM/IEEE conference on Supercomputing
Dynamic object management for distributed data structures
Proceedings of the 1992 ACM/IEEE conference on Supercomputing
The Alpha demonstration unit: a high-performance multiprocessor
Communications of the ACM
The verification of cache coherence protocols
SPAA '93 Proceedings of the fifth annual ACM symposium on Parallel algorithms and architectures
A case for uniform memory access multiprocessors
ACM SIGARCH Computer Architecture News
Empirical study of latency hiding on a fine-grain parallel processor
ICS '93 Proceedings of the 7th international conference on Supercomputing
Dynamic switching of coherent cache protocols and its effects on Doacross loops
ICS '93 Proceedings of the 7th international conference on Supercomputing
Scan grammars: parallel attribute evaluation via data-parallelism
SPAA '93 Proceedings of the fifth annual ACM symposium on Parallel algorithms and architectures
Cache inclusion and processor sampling in multiprocessor simulations
SIGMETRICS '93 Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Introducing a New Cache Design into Vector Computers
IEEE Transactions on Computers
Sequential consistency versus linearizability
ACM Transactions on Computer Systems (TOCS)
SCISM: a scalable compound instruction set machine
IBM Journal of Research and Development
An evaluation of directory protocols for medium-scale shared-memory multiprocessors
ICS '94 Proceedings of the 8th international conference on Supercomputing
Performance evaluation of hybrid hardware and software distributed shared memory protocols
ICS '94 Proceedings of the 8th international conference on Supercomputing
A quantitative analysis of cache policies for scalable network file systems
SIGMETRICS '94 Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Data replication for mobile computers
SIGMOD '94 Proceedings of the 1994 ACM SIGMOD international conference on Management of data
Exploring the design space for a shared-cache multiprocessor
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
Techniques for reducing consistency-related communication in distributed shared-memory systems
ACM Transactions on Computer Systems (TOCS)
Recovery protocols for shared memory database systems
SIGMOD '95 Proceedings of the 1995 ACM SIGMOD international conference on Management of data
Matrix Partitioning on a Virtual Shared Memory Parallel Machine
IEEE Transactions on Parallel and Distributed Systems
Evaluation of design alternatives for a multiprocessor microprocessor
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Evaluating virtual channels for cache-coherent shared-memory multiprocessors
ICS '96 Proceedings of the 10th international conference on Supercomputing
Strategic directions in computer architecture
ACM Computing Surveys (CSUR) - Special ACM 50th-anniversary issue: strategic directions in computing research
Verification techniques for cache coherence protocols
ACM Computing Surveys (CSUR)
A memory management unit and cache controller for the MARS system
MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
Transactional client-server cache consistency: alternatives and performance
ACM Transactions on Database Systems (TODS)
The interaction of parallel programming constructs and coherence protocols
PPOPP '97 Proceedings of the sixth ACM SIGPLAN symposium on Principles and practice of parallel programming
Analytical Prediction of Performance for Cache Coherence Protocols
IEEE Transactions on Computers
Minimization of Communication Cost Through Caching in Mobile Environments
IEEE Transactions on Parallel and Distributed Systems
Formal verification of complex coherence protocols using symbolic state models
Journal of the ACM (JACM)
On the inclusion properties for multi-level cache hierarchies
25 years of the international symposia on Computer architecture (selected papers)
An evaluation of directory schemes for cache coherence
25 years of the international symposia on Computer architecture (selected papers)
Weak ordering—a new definition
25 years of the international symposia on Computer architecture (selected papers)
Evaluating the Effect of Coherence Protocols on the Performance of Parallel Programming Constructs
International Journal of Parallel Programming
Comprehensive Hardware and Software Support for Operating Systems to Exploit MP Memory Hierarchies
IEEE Transactions on Computers
IEEE Transactions on Parallel and Distributed Systems
ICS '89 Proceedings of the 3rd international conference on Supercomputing
Weak ordering—a new definition
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Synchronization with multiprocessor caches
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Adaptive software cache management for distributed shared memory architectures
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
The directory-based cache coherence protocol for the DASH multiprocessor
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Performance of an OLTP application on symmetry multiprocessor system
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Parallel RAMs with owned global memory and deterministic context-free language recognition
Journal of the ACM (JACM)
Formal Automatic Verification of Cache Coherence in Multiprocessors with Relaxed Memory Models
IEEE Transactions on Parallel and Distributed Systems
A memory coherence technique for online transient error recovery of FPGA configurations
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
A process cache memory for tightly coupled multiprocessor systems
ACM-SE 30 Proceedings of the 30th annual Southeast regional conference
ADir_pNB: A Cost-Effective Way to Implement Full Map Directory-Based Cache Coherence Protocols
IEEE Transactions on Computers
Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol
IEEE Transactions on Parallel and Distributed Systems
Reduction and Quantifier Elimination Techniques for Program Validation
Formal Methods in System Design
Two-Phase Barrier: A Synchronization Primitive for Improving the Processor Utilization
International Journal of Parallel Programming
A Simulation Study of Hardware-Oriented DSM Approaches
IEEE Parallel & Distributed Technology: Systems & Technology
Verifying a Multiprocessor Cache Controller Using Random Test Generation
IEEE Design & Test
Microprocessor Memory Management Units
IEEE Micro
Design and Analysis of Cache Coherent Multistage Interconnection Networks
IEEE Transactions on Computers
A Quantitative Evaluation of Cache Types for High-Performance Computer Systems
IEEE Transactions on Computers
Techniques for Update Handling in the Enhanced Client-Server DBMS
IEEE Transactions on Knowledge and Data Engineering
The Performance of Spin Lock Alternatives for Shared-Memory Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Error Recovery in Shared Memory Multiprocessors Using Private Caches
IEEE Transactions on Parallel and Distributed Systems
A Multiprocessor Bus Design Model Validated by System Measurement
IEEE Transactions on Parallel and Distributed Systems
Performance Analysis of Buffer Coherency Policies in a Multisystem Data Sharing Environment
IEEE Transactions on Parallel and Distributed Systems
A Unified Formalization of Four Shared-Memory Models
IEEE Transactions on Parallel and Distributed Systems
A New Approach for the Verification of Cache Coherence Protocols
IEEE Transactions on Parallel and Distributed Systems
A Trace-Driven Simulator for Performance Evaluation of Cache-Based Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
Stack Evaluation of Arbitrary Set-Associative Multiprocessor Caches
IEEE Transactions on Parallel and Distributed Systems
Performance Comparison of Three Modern DBMS Architectures
IEEE Transactions on Software Engineering
Formal Verification of Delayed Consistency Protocols
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
Performance and Scalability of Client-Server Database Architectures
VLDB '92 Proceedings of the 18th International Conference on Very Large Data Bases
Disseminating Updates on Broadcast Disks
VLDB '96 Proceedings of the 22th International Conference on Very Large Data Bases
FMona: A Tool for Expressing Validation Techniques over Infinite State Systems
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
A Program Behavior Model and Its Evaluation
MASCOTS '95 Proceedings of the 3rd International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
Implementing Snoop-Coherence Protocol for Future SMP Architectures
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Boosting the Performance of Three-Tier Web Servers Deploying SMP Architecture
Revised Papers from the NETWORKING 2002 Workshops on Web Engineering and Peer-to-Peer Computing
Verifying Sequential Consistency on Shared-Memory Multiprocessor Systems
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Automated Inductive Verification of Parameterized Protocols
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Algorithmic Verification of Invalidation-Based Protocols
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Efficient Object Caching for Distributed Java RMI Applications
Middleware '01 Proceedings of the IFIP/ACM International Conference on Distributed Systems Platforms Heidelberg
On cache memory hierarchy for Chip-Multiprocessor
ACM SIGARCH Computer Architecture News
Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture
IEEE Transactions on Parallel and Distributed Systems
Multiprocessor validation of the Pentium Pro microprocessor
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
Hardware Controlled Prefeching in Directory-Based Cache Coherent Systems
FRONTIERS '96 Proceedings of the 6th Symposium on the Frontiers of Massively Parallel Computation
Software cache coherence for large scale multiprocessors
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
Two techniques for improving performance on bus-based multiprocessors
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
A Cache Coherency Protocol for Optically Connected Parallel Computer Systems
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
The impact of shared-cache clustering in small-scale shared-memory multiprocessors
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
Improving the Data Cache Performance of Multiprocessor Operating Systems
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
Relaxing Cache Coherence Protocol with QOLB Synchronizations
HPC-ASIA '97 Proceedings of the High-Performance Computing on the Information Superhighway, HPC-Asia '97
High-Speed Image reconstruction based on CBP and Fourier Inversion Methods
HPC-ASIA '97 Proceedings of the High-Performance Computing on the Information Superhighway, HPC-Asia '97
Using cache optimizing compiler for managing software cache on distributed shared memory system
HPC-ASIA '97 Proceedings of the High-Performance Computing on the Information Superhighway, HPC-Asia '97
Evaluation of cache consistency algorithm performance
MASCOTS '96 Proceedings of the 4th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems
A Method for Combining Replication with Caching
SRDS '99 Proceedings of the 18th IEEE Symposium on Reliable Distributed Systems
A Recoverable Distributed Shared Memory Integrating Coherence and Recoverability
FTCS '95 Proceedings of the Twenty-Fifth International Symposium on Fault-Tolerant Computing
Constraint-Based Verification of Parameterized Cache Coherence Protocols
Formal Methods in System Design
Pipelined functional tree accesses and updates: scheduling, synchronization, caching and coherence
Journal of Functional Programming
Inductively Verifying Invariant Properties of Parameterized Systems
Automated Software Engineering
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Journal of Parallel and Distributed Computing
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling
Proceedings of the 32nd annual international symposium on Computer Architecture
Synchronization and cache coherence in computer design
Journal of Computing Sciences in Colleges
Characterization of TCC on Chip-Multiprocessors
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques
Register aware scheduling for distributed cache clustered architecture
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Compositional analysis for verification of parameterized systems
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2003)
Cooperative caching: using remote client memory to improve file system performance
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Accurate memory signatures and synthetic address traces for HPC applications
Proceedings of the 22nd annual international conference on Supercomputing
Comparison of memory write policies for NoC based multicore cache coherent systems
Proceedings of the conference on Design, automation and test in Europe
Efficient shared-memory support for parallel graph reduction
Future Generation Computer Systems
A new trace-driven shared-memory multiprocessors machine simulator
International Journal of Computers and Applications
Compositional analysis for verification of parameterized systems
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Proceedings of the 9th International Conference on Autonomous Agents and Multiagent Systems: volume 1 - Volume 1
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Comparative analysis of SMP click scheduling techniques
QoS-IP'05 Proceedings of the Third international conference on Quality of Service in Multiservice IP Networks
PSnAP: accurate synthetic address streams through memory profiles
LCPC'09 Proceedings of the 22nd international conference on Languages and Compilers for Parallel Computing
Balancing Programmability and Silicon Efficiency of Heterogeneous Multicore Architectures
ACM Transactions on Embedded Computing Systems (TECS)
Computer Communications
Latencies of conflicting writes on contemporary multicore architectures
PaCT'07 Proceedings of the 9th international conference on Parallel Computing Technologies
| Hi-index | 0.09 |
Using simulation, we examine the efficiency of several distributed, hardware-based solutions to the cache coherence problem in shared-bus multiprocessors. For each of the approaches, the associated protocol is outlined. The simulation model is described, and results from that model are presented. The magnitude of the potential performance difference between the various approaches indicates that the choice of coherence solution is very important in the design of an efficient shared-bus multiprocessor, since it may limit the number of processors in the system.