Cache coherence protocols: evaluation using a multiprocessor simulation model
ACM Transactions on Computer Systems (TOCS)
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
The performance of cache-coherent ring-based multiprocessors
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
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Virtually all the shared-memory architectures that have appeared in recent times are of the NUMA (Non-Uniform Memory Access) type. A centralized memory that is uniformly accessible by all the nodes of a multiprocessor, rather than memory that is distributed among the nodes, leads to a simpler platform for software to run on. Certain performance advantages gained by distributing memory among nodes are not all that clearcut. The same penalties are being paid, albeit in a different form, and at a different time in the execution of a program.Ring based multiprocessors built from fast point-to-point links can be the next generation of medium scalable UMA machines, replacing the shared-bus kind. One such architecture is described along with details of how any snooping protocol, including those of the write-broadcast variety, can be ported to this new environment.