Cache coherence protocols: evaluation using a multiprocessor simulation model
ACM Transactions on Computer Systems (TOCS)
Line (block) size choice for CPU cache memories
IEEE Transactions on Computers
Firefly: A Multiprocessor Workstation
IEEE Transactions on Computers - Special issue on architectural support for programming languages and operating systems
Performance tradeoffs in cache design
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
A cache coherence scheme with fast selective invalidation
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
The Stanford Dash Multiprocessor
Computer
Cache Invalidation Patterns in Shared-Memory Multiprocessors
IEEE Transactions on Computers
An empirical evaluation of two memory-efficient directory methods
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Implementing a cache consistency protocol
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Design and Analysis of a Scalable Cache Coherence Scheme Based on Clocks and Timestamps
IEEE Transactions on Parallel and Distributed Systems
Instruction Cache Replacement Policies and Organizations
IEEE Transactions on Computers
Cache management for discrete processor architectures
ISPA'05 Proceedings of the Third international conference on Parallel and Distributed Processing and Applications
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A cache coherency protocol was developed for the Multiple Channel Architecture (MCA), a proposed computer architecture that uses an optical inter-connection network to overcome many of the problems associated with internode communication in massively parallel systems. A directory-based protocol was attempted, but testing revealed a serious scalability problem associated with the collection of acknowledgement packets. An alternative scheme, which employs snooping on a special-purpose, time-division multiplexed optical channel, performed well. Additionally, the benefits of a separate cache for shared data were examined. Simulations demonstrate that the coherency protocol improves system performance and scalability, and that additional performance gains may be attained by customizing shared cache parameters.