Instruction Cache Replacement Policies and Organizations

Authors:
J. E. Smith;J. R. Goodman
Affiliations:
Department of Electrical and Computer Engineering, University of Wisconsin-Madison;-
Venue:
IEEE Transactions on Computers
Year:
1985

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Abstract

Instruction cache replacement policies and organizations are analyzed both theoretically and experimentally. Theoretical analyses are based on a new model for cache referencesthe loop model. First the loop model is used to study replacement policies and cache organizations. It is concluded theoretically that random replacement is better than LRU and FIFO, and that under certain circumstances, a direct-mapped or set-associative cache may perform better than a full-associative cache organization. Experimental results using instruction trace data are then given and analyzed. The experimental results indicate that the loop model provides a good explanation for observed cache performance.