Correct memory operation of cache-based multiprocessors
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Lazy release consistency for software distributed shared memory
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
The DASH prototype: implementation and performance
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
The SPARC architecture manual (version 9)
The SPARC architecture manual (version 9)
The PowerPC architecture: a specification for a new family of RISC processors
The PowerPC architecture: a specification for a new family of RISC processors
Alpha AXP architecture reference manual (2nd ed.)
Alpha AXP architecture reference manual (2nd ed.)
An analysis of dag-consistent distributed shared-memory algorithms
Proceedings of the eighth annual ACM symposium on Parallel algorithms and architectures
Memory consistency models for shared-memory multiprocessors
Memory consistency models for shared-memory multiprocessors
Computation-centric memory models
Proceedings of the tenth annual ACM symposium on Parallel algorithms and architectures
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Weak ordering—a new definition
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Memory consistency and event ordering in scalable shared-memory multiprocessors
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
The MIPS R10000 Superscalar Microprocessor
IEEE Micro
A Unified Formalization of Four Shared-Memory Models
IEEE Transactions on Parallel and Distributed Systems
The StarT-Voyager Parallel System
PACT '98 Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques
CACHET: an adaptive cache coherence protocol for distributed shared-memory systems
ICS '99 Proceedings of the 13th international conference on Supercomputing
Improving the Java memory model using CRF
OOPSLA '00 Proceedings of the 15th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
Hiding Relaxed Memory Consistency with a Compiler
IEEE Transactions on Computers - Special issue on the parallel architecture and compilation techniques conference
Design and evaluation of a conit-based continuous consistency model for replicated services
ACM Transactions on Computer Systems (TOCS)
The Optimistic Readers Transformation
ECOOP '01 Proceedings of the 15th European Conference on Object-Oriented Programming
Proofs of Correctness of Cache-Coherence Protocols
FME '01 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods for Increasing Software Productivity
Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture
IEEE Transactions on Parallel and Distributed Systems
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
The Complexity of Verifying Memory Coherence and Consistency
IEEE Transactions on Parallel and Distributed Systems
Memory Model = Instruction Reordering + Store Atomicity
Proceedings of the 33rd annual international symposium on Computer Architecture
Store Atomicity for Transactional Memory
Electronic Notes in Theoretical Computer Science (ENTCS)
Formal Verification of a C-like Memory Model and Its Uses for Verifying Program Transformations
Journal of Automated Reasoning
Relaxed memory models: an operational approach
Proceedings of the 36th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
A unified formal specification and analysis of the new java memory models
ASM'03 Proceedings of the abstract state machines 10th international conference on Advances in theory and practice
Euro-Par'10 Proceedings of the 16th international Euro-Par conference on Parallel processing: Part II
WOMM: a weak operational memory model
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part I
Partial-coherence abstractions for relaxed memory models
Proceedings of the 32nd ACM SIGPLAN conference on Programming language design and implementation
Automatic inference of memory fences
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Formal verification of a memory model for C-like imperative languages
ICFEM'05 Proceedings of the 7th international conference on Formal Methods and Software Engineering
An efficient software shared virtual memory for the single-chip cloud computer
Proceedings of the Second Asia-Pacific Workshop on Systems
Verifying local transformations on relaxed memory models
CC'10/ETAPS'10 Proceedings of the 19th joint European conference on Theory and Practice of Software, international conference on Compiler Construction
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We present a new mechanism-oriented memory model called Commit-Reconcile & Fences (CRF) and define it using algebraic rules. Many existing memory models can be described as restricted versions of CRF. The model has been designed so that it is both easy for architects to implement, and stable enough to serve as a target machine interface for compilers of high-level languages. The CRF model exposes a semantic notion of caches (saches), and decomposes load and store instructions into finer-grain operations. We sketch how to integrate CRF into modern microprocessors and outline an adaptive coherence protocol to implement CRF in distributed shared-memory systems. CRF offers an upward compatible way to design next generation computer systems.