Performance and evaluation of LISP systems
Performance and evaluation of LISP systems
Global register allocation at link time
SIGPLAN '86 Proceedings of the 1986 SIGPLAN symposium on Compiler construction
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
Lisp on a reduced-instruction-set processor: characterization and optimization
Lisp on a reduced-instruction-set processor: characterization and optimization
The SPARC architecture manual: version 8
The SPARC architecture manual: version 8
Reduced instruction set computers
Communications of the ACM - Special section on computer architecture
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
Performance of various computers using standard linear equations software in a Fortran environment
ACM SIGARCH Computer Architecture News
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A large register set can be exploited by keeping variables and constants in registers instead of in memory. Hardware register windows and compile-time or link-time global register allocation are ways to do this. A measure of the effectiveness of any of these register management schemes is how thoroughly they remove loads and stores. This measure must also count extra loads and stores executed because of window overflow or conflicts between procedures.By combining profiling, instrumentation, and in-line simulation, we measured the effectiveness of several register management schemes. These included compile-time and link-time schemes for allocating registers, and register window schemes using fixed-size or variable-sized windows. Link-time allocation based on profile information was the clear winner in some cases and did about as well as windows in the rest. Even link-time allocation based on an estimated profile was about as good as windows. Variable-sized windows sometimes did better than fixed-sized windows, but the difference was usually small.Register windows require extra logic in the data path, which may slow the machine cycle slightly, and often use more chip real estate for additional registers. Proponents of windows suppose that they trade these drawbacks for a reduction in the number of memory references they must make. Our results show that this tradeoff should be made the other way. Keep the hardware simple, because a link-time register allocator can nearly duplicate the improvement in memory reference frequency. Then the cycle time can be as small as possible, resulting in faster programs overall.