Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
SAT-Based Verification without State Space Traversal
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Constructive Analysis of Cyclic Circuits
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Causality analysis of synchronous programs with delayed actions
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Challenges in the Specification of Full Contracts
IFM '09 Proceedings of the 7th International Conference on Integrated Formal Methods
Constructive Boolean circuits and the exactness of timed ternary simulation
Formal Methods in System Design
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