Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
On the complexity of branching programs and decision trees for clique functions
Journal of the ACM (JACM)
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
The Area-Time Complexity of Binary Multiplication
Journal of the ACM (JACM)
Information transfer and area-time tradeoffs for VLSI multiplication
Communications of the ACM
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
STOC '79 Proceedings of the eleventh annual ACM symposium on Theory of computing
Some complexity questions related to distributive computing(Preliminary Report)
STOC '79 Proceedings of the eleventh annual ACM symposium on Theory of computing
Computational Aspects of VLSI
Using BDDs to verify multipliers
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
Functional approaches to generating orderings for efficient symbolic representations
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Reducing BDD size by exploiting functional dependencies
DAC '93 Proceedings of the 30th international Design Automation Conference
Linking BDD-based symbolic evaluation to interactive theorem-proving
DAC '93 Proceedings of the 30th international Design Automation Conference
The Size of Reduced OBDD's and Optimal Read-Once Branching Programs for Almost all Boolean Functions
IEEE Transactions on Computers
Auxiliary variables for extending symbolic traversal techniques to data paths
DAC '94 Proceedings of the 31st annual Design Automation Conference
Efficient OBDD-based boolean manipulation in CAD beyond current limits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Binary decision diagrams and beyond: enabling technologies for formal verification
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
A lower bound for integer multiplication with read-once branching programs
STOC '95 Proceedings of the twenty-seventh annual ACM symposium on Theory of computing
Model checking large software specifications
SIGSOFT '96 Proceedings of the 4th ACM SIGSOFT symposium on Foundations of software engineering
Bit-level analysis of an SRT divider circuit
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Compilation of optimized OBDD-algorithms
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
On the Expressive Power of OKFDDs
Formal Methods in System Design
Indexed BDDs: Algorithmic Advances in Techniques to Represent and Verify Boolean Functions
IEEE Transactions on Computers
Improving efficiency of symbolic model checking for state-based system requirements
Proceedings of the 1998 ACM SIGSOFT international symposium on Software testing and analysis
Fast exact minimization of BDDs
DAC '98 Proceedings of the 35th annual Design Automation Conference
Word-level decision diagrams, WLCDs and division
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Auxiliary variables for BDD-based representation and manipulation of Boolean functions
ACM Transactions on Design Automation of Electronic Systems (TODAES)
On Variable Ordering and Decomposition Type Choice in OKFDDs
IEEE Transactions on Computers
Formal verification in hardware design: a survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Using lower bounds during dynamic BDD minimization
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Formal verification using parametric representations of Boolean constraints
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Automatic Synthesis of Large Telescopic Units Based on Near-Minimum Timed Supersetting
IEEE Transactions on Computers
Ordered Binary Decision Diagrams and Minimal Trellises
IEEE Transactions on Computers
Prove that a faulty multiplier is faulty!?
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Efficient manipulation algorithms for linearly transformed BDDs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Complexity of finite-horizon Markov decision process problems
Journal of the ACM (JACM)
OBDD Minimization Based on Two-Level Representation of Boolean Functions
IEEE Transactions on Computers
Dynamic minimization of word-level decision diagrams
Proceedings of the conference on Design, automation and test in Europe
Equivalence checking of integer multipliers
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
STOC '01 Proceedings of the thirty-third annual ACM symposium on Theory of computing
Efficient filtering in publish-subscribe systems using binary decision diagrams
ICSE '01 Proceedings of the 23rd International Conference on Software Engineering
Decomposable negation normal form
Journal of the ACM (JACM)
The nonapproximability of OBDD minimization
Information and Computation
Ordered binary decision diagrams as knowledge-bases
Artificial Intelligence
Self-referential verification of gate-level implementations of arithmetic circuits
Proceedings of the 39th annual Design Automation Conference
Boolean satisfiability with transitivity constraints
ACM Transactions on Computational Logic (TOCL)
Ordered binary decision diagrams
Logic Synthesis and Verification
A Comparison of Free BDDs and Transformed BDDs
Formal Methods in System Design
Data structures for Boolean functions
Computational Discrete Mathematics
Principles in the Evolutionary Design of Digital Circuits—Part I
Genetic Programming and Evolvable Machines
On WLCDs and the Complexity of Word-Level Decision Diagrams—A Lower Bound for Division
Formal Methods in System Design
Induction-based gate-level verification of multipliers
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Polynomial Formal Verification of Multipliers
Formal Methods in System Design
A Characterization of Binary Decision Diagrams
IEEE Transactions on Computers
Efficient Boolean Manipulation with OBDD's Can be Extended to FBDD's
IEEE Transactions on Computers
Model Checking Large Software Specifications
IEEE Transactions on Software Engineering
The BDD space complexity of different forms of concurrency
Fundamenta Informaticae - Application of concurrency to system design
Integration, the VLSI Journal
Minimization of word-level decision diagrams
Integration, the VLSI Journal
Lower bounds for linearly transformed OBDDs and FBDDs
Journal of Computer and System Sciences
MFCS '00 Proceedings of the 25th International Symposium on Mathematical Foundations of Computer Science
Graph-Driven Free Parity BDDs: Algorithms and Lower Bounds
MFCS '01 Proceedings of the 26th International Symposium on Mathematical Foundations of Computer Science
MFCS '02 Proceedings of the 27th International Symposium on Mathematical Foundations of Computer Science
Model Checking: A Tutorial Overview
MOVEP '00 Proceedings of the 4th Summer School on Modeling and Verification of Parallel Processes
New Bounds on the OBDD-Size of Integer Multiplication via Universal Hashing
STACS '01 Proceedings of the 18th Annual Symposium on Theoretical Aspects of Computer Science
PSI '99 Proceedings of the Third International Andrei Ershov Memorial Conference on Perspectives of System Informatics
Progress on the State Explosion Problem in Model Checking
Informatics - 10 Years Back. 10 Years Ahead.
Separating Oblivious and Non-oblivious BPs
COCOON '01 Proceedings of the 7th Annual International Conference on Computing and Combinatorics
Model checking: a tutorial overview
Modeling and verification of parallel processes
Symbolic representation with ordered function templates
Proceedings of the 40th annual Design Automation Conference
Handbook of automated reasoning
Time-space tradeoff lower bounds for integer multiplication and graphs of arithmetic functions
Proceedings of the thirty-fifth annual ACM symposium on Theory of computing
How many decomposition types do we need? [decision diagrams]
EDTC '95 Proceedings of the 1995 European conference on Design and Test
K*BMDs: A New Data Structure for Verification
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Decision Diagrams in Synthesis - Algorithms, Applications and Extensions
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Polynomial Formal Verification of Multipliers
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
A genetic algorithm for decomposition type choice in OKFDDs
INBS '95 Proceedings of the First International Symposium on Intelligence in Neural and Biological Systems (INBS'95)
Algorithms and heuristics in VLSI design
Experimental algorithmics
Counterexample-guided abstraction refinement for symbolic model checking
Journal of the ACM (JACM)
Efficient Minimization and Manipulation of Linearly Transformed Binary Decision Diagrams
IEEE Transactions on Computers
Resolution and binary decision diagrams cannot simulate each other polynomially
Discrete Applied Mathematics - The renesse issue on satisfiability
A lower bound for integer multiplication on randomized ordered read-once branching programs
Information and Computation
Improved Symoblic Simulation by Dynamic Funtional Space Partitioning
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Design Verification by Test Vectors and Arithmetic Transform Universal Test Set
IEEE Transactions on Computers
BDDs: design, analysis, complexity, and applications
Discrete Applied Mathematics - Optimal discrete structure and algorithms (ODSA 2000)
Improved symbolic simulation by functional-space decomposition
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Combination of Lower Bounds in Exact BDD Minimization
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Conformant planning via symbolic model checking and heuristic search
Artificial Intelligence
Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator
ACM Transactions on Design Automation of Electronic Systems (TODAES)
BDD-based verification of scalable designs
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
Bounds on the OBDD-size of integer multiplication via universal hashing
Journal of Computer and System Sciences
Lower bounds for dynamic BDD reordering
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Strong planning under partial observability
Artificial Intelligence
An efficient estimation of the ROBDD's complexity
Integration, the VLSI Journal
The complexity of model checking concurrent programs against CTLK specifications
AAMAS '06 Proceedings of the fifth international joint conference on Autonomous agents and multiagent systems
Lower bounds for restricted read-once parity branching programs
Theoretical Computer Science
Embedded software verification using symbolic execution and uninterpreted functions
International Journal of Parallel Programming
Theoretical Computer Science
Approximating Boolean functions by OBDDs
Discrete Applied Mathematics
Synthesis of irregular combinational functions with large don't care sets
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Bounded model checking of infinite state systems
Formal Methods in System Design
Better upper bounds on the QOBDD size of integer multiplication
Discrete Applied Mathematics
Probabilistic abstraction for model checking: An approach based on property testing
ACM Transactions on Computational Logic (TOCL)
IEEE Transactions on Computers
Electronic Notes in Theoretical Computer Science (ENTCS)
A View from the Engine Room: Computational Support for Symbolic Model Checking
25 Years of Model Checking
Inferring Congruence Equations Using SAT
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
Symbolic Reachability for Process Algebras with Recursive Data Types
Proceedings of the 5th international colloquium on Theoretical Aspects of Computing
Lower Bounds for Syntactically Multilinear Algebraic Branching Programs
MFCS '08 Proceedings of the 33rd international symposium on Mathematical Foundations of Computer Science
Investigating data preprocessing methods for circuit complexity models
Expert Systems with Applications: An International Journal
A note on the size of OBDDs for the graph of integer multiplication
Information Processing Letters
Shared Ordered Binary Decision Diagrams for Dempster-Shafer Theory
ECSQARU '07 Proceedings of the 9th European Conference on Symbolic and Quantitative Approaches to Reasoning with Uncertainty
Larger Lower Bounds on the OBDD Complexity of Integer Multiplication
LATA '09 Proceedings of the 3rd International Conference on Language and Automata Theory and Applications
Verification Techniques for System-Level Design
Verification Techniques for System-Level Design
Conformant planning via symbolic model checking
Journal of Artificial Intelligence Research
Journal of Artificial Intelligence Research
Strong planning under partial observability
Artificial Intelligence
Prediction of area and length complexity measures for binary decision diagrams
Expert Systems with Applications: An International Journal
Bounded Semantics of CTL and SAT-Based Verification
ICFEM '09 Proceedings of the 11th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
Symbolic OBDD-Based Reachability Analysis Needs Exponential Space
SOFSEM '10 Proceedings of the 36th Conference on Current Trends in Theory and Practice of Computer Science
BDDs-design, analysis, complexity, and applications
Discrete Applied Mathematics
Safety Property Verification of Cyclic Synchronous Circuits
Electronic Notes in Theoretical Computer Science (ENTCS)
Probabilistic Verification and Approximation
Electronic Notes in Theoretical Computer Science (ENTCS)
An efficient estimation of the ROBDD's complexity
Integration, the VLSI Journal
The computational complexity of equivalence and isomorphism problems
The computational complexity of equivalence and isomorphism problems
On the size of randomized OBDDs and read-once branching programs for k-stable functions
STACS'99 Proceedings of the 16th annual conference on Theoretical aspects of computer science
On the symbolic computation of the hardest configurations of the RUSH HOUR game
CG'06 Proceedings of the 5th international conference on Computers and games
Dynamically resizable binary decision diagrams
Proceedings of the 20th symposium on Great lakes symposium on VLSI
On the OBDD complexity of the most significant bit of integer multiplication
TAMC'08 Proceedings of the 5th international conference on Theory and applications of models of computation
Exponential space complexity for symbolic maximum flow algorithms in 0-1 networks
MFCS'10 Proceedings of the 35th international conference on Mathematical foundations of computer science
Randomized OBDDs for the most significant bit of multiplication need exponential space
Information Processing Letters
Knowledge compilation meets database theory: compiling queries to decision diagrams
Proceedings of the 14th International Conference on Database Theory
On symbolic OBDD-based algorithms for the minimum spanning tree problem
COCOA'10 Proceedings of the 4th international conference on Combinatorial optimization and applications - Volume Part II
Larger lower bounds on the OBDD complexity of integer multiplication
Information and Computation
Randomized OBDDs for the most significant bit of multiplication need exponential size
SOFSEM'11 Proceedings of the 37th international conference on Current trends in theory and practice of computer science
On the OBDD complexity of the most significant bit of integer multiplication
Theoretical Computer Science
Treewidth in verification: local vs. global
LPAR'05 Proceedings of the 12th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
Finding compact BDDs using genetic programming
EuroGP'06 Proceedings of the 2006 international conference on Applications of Evolutionary Computing
A larger lower bound on the OBDD complexity of the most significant bit of multiplication
LATIN'10 Proceedings of the 9th Latin American conference on Theoretical Informatics
Genetic algorithms for the variable ordering problem of binary decision diagrams
FOGA'05 Proceedings of the 8th international conference on Foundations of Genetic Algorithms
The complexity of model checking concurrent programs against CTLK specifications
DALT'06 Proceedings of the 4th international conference on Declarative Agent Languages and Technologies
The complexity of classical and quantum branching programs: a communication complexity approach
SAGA'05 Proceedings of the Third international conference on StochasticAlgorithms: foundations and applications
Widening ROBDDs with prime implicants
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
SBMC: symmetric bounded model checking
VECoS'10 Proceedings of the Fourth international conference on Verification and Evaluation of Computer and Communication Systems
On symbolic OBDD-based algorithms for the minimum spanning tree problem
Theoretical Computer Science
The BDD Space Complexity of Different Forms of Concurrency
Fundamenta Informaticae - Application of Concurrency to System Design
BDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition
Proceedings of the 50th Annual Design Automation Conference
Priority functions for the approximation of the metric TSP
Information Processing Letters
Applications of Boolean Satisfiability to Verification and Testing of Switch-Level Circuits
Journal of Electronic Testing: Theory and Applications
| Hi-index | 15.02 |
Lower-bound results on Boolean-function complexity under two different models are discussed. The first is an abstraction of tradeoffs between chip area and speed in very-large-scale-integrated (VLSI) circuits. The second is the ordered binary decision diagram (OBDD) representation used as a data structure for symbolically representing and manipulating Boolean functions. The lower bounds demonstrate the fundamental limitations of VLSI as an implementation medium, and that of the OBDD as a data structure. It is shown that the same technique used to prove that any VLSI implementation of a single output Boolean function has area-time complexity AT/sup 2/= Omega (n/sup 2/) also proves that any OBDD representation of the function has Omega (c/sup n/) vertices for some cor=ior=n, the following lower bounds are proved: any VLSI implementation must have AT/sup 2/= Omega (i/sup 2/) and any OBDD representation must have Omega (1.09/sup i/) vertices.