Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
Boolean matching using generalized Reed-Muller forms
DAC '94 Proceedings of the 31st annual Design Automation Conference
DAC '94 Proceedings of the 31st annual Design Automation Conference
Fast OFDD based minimization of fixed polarity Reed-Muller expressions
EURO-DAC '94 Proceedings of the conference on European design automation
On the relation between BDDs and FDDs
Information and Computation
Interleaving based variable ordering methods for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Comments on "A Characterization of Binary Decision Diagrams"
IEEE Transactions on Computers
Dynamic minimization of OKFDDs
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
ICALP '95 Proceedings of the 22nd International Colloquium on Automata, Languages and Programming
Formal verification of a PowerPC microprocessor
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
On variable ordering of binary decision diagrams for the application of multi-level logic synthesis
EURO-DAC '91 Proceedings of the conference on European design automation
OBDD Minimization Based on Two-Level Representation of Boolean Functions
IEEE Transactions on Computers
Minimization of word-level decision diagrams
Integration, the VLSI Journal
| Hi-index | 14.98 |
We present methods for the construction of small Ordered Kronecker Functional Decision Diagrams (OKFDDs). OKFDDs are a generalization of Ordered Binary Decision Diagrams (OBDDs) and Ordered Functional Decision Diagrams (OFDDs) as well. Starting with an upper bound for the size of an OKFDD representing a tree-like circuit, we develop different heuristics to find good variable orderings and decomposition types for OKFDDs representing two-level and multilevel circuits, respectively. Experimental results are presented to show the efficiency of our approaches.