Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Shared binary decision diagram with attributed edges for efficient Boolean function manipulation
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Functional approaches to generating orderings for efficient symbolic representations
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
On variable ordering of binary decision diagrams for the application of multi-level logic synthesis
EURO-DAC '91 Proceedings of the conference on European design automation
BDD variable ordering for interacting finite state machines
DAC '94 Proceedings of the 31st annual Design Automation Conference
MORE: an alternative implementation of BDD packages by multi-operand synthesis
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Safe BDD minimization using don't cares
DAC '97 Proceedings of the 34th annual Design Automation Conference
Fast exact minimization of BDDs
DAC '98 Proceedings of the 35th annual Design Automation Conference
Sampling schemes for computing OBDD variable orderings
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
On Variable Ordering and Decomposition Type Choice in OKFDDs
IEEE Transactions on Computers
Using lower bounds during dynamic BDD minimization
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Free MDD-based software optimization techniques for embedded systems
DATE '00 Proceedings of the conference on Design, automation and test in Europe
OBDD Minimization Based on Two-Level Representation of Boolean Functions
IEEE Transactions on Computers
The multiple variable order problem for binary decision diagrams: theory and practical application
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Minimization of word-level decision diagrams
Integration, the VLSI Journal
Model Checking: A Tutorial Overview
MOVEP '00 Proceedings of the 4th Summer School on Modeling and Verification of Parallel Processes
Model checking: a tutorial overview
Modeling and verification of parallel processes
Handbook of automated reasoning
Fast and Efficient Construction of BDDs by Reordering Based Synthesis
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Decision Diagrams in Synthesis - Algorithms, Applications and Extensions
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
A genetic algorithm for decomposition type choice in OKFDDs
INBS '95 Proceedings of the First International Symposium on Intelligence in Neural and Biological Systems (INBS'95)
An integrated environment for HDL verification
IVC '95 Proceedings of the 4th IEEE International Verilog HDL Conference
Combining ordered best-first search with branch and bound for exact BDD minimization
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Combination of Lower Bounds in Exact BDD Minimization
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Quasi-Exact BDD Minimization Using Relaxed Best-First Search
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
BDD-based verification of scalable designs
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
Lower bounds for dynamic BDD reordering
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Distributed dynamic BDD reordering
Proceedings of the 43rd annual Design Automation Conference
Proceedings of the 12th ACM SIGKDD international conference on Knowledge discovery and data mining
Learning to order BDD variables in verification
Journal of Artificial Intelligence Research
A microcanonical optimization algorithm for BDD minimization problem
IEA/AIE'07 Proceedings of the 20th international conference on Industrial, engineering, and other applications of applied intelligent systems
BDDs in a branch and cut framework
WEA'05 Proceedings of the 4th international conference on Experimental and Efficient Algorithms
Dynamic segregative genetic algorithm for optimizing the variable ordering of ROBDDs
Proceedings of the 14th annual conference on Genetic and evolutionary computation
| Hi-index | 0.02 |