Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Test pattern generation for sequential MOS circuits by symbolic fault simulation
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
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Coded time-symbolic simulation using shared binary decision diagram
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Breadth-first manipulation of SBDD of Boolean functions for vector processing
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Symbolic Boolean manipulation with ordered binary-decision diagrams
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Exact evaluation of diagnostic test resolution
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Edge-valued binary decision diagrams for multi-level hierarchical verification
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Functional approaches to generating orderings for efficient symbolic representations
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Zero-suppressed BDDs for set manipulation in combinatorial problems
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Multilevel logic optimization of very high complexity circuits
EURO-DAC '94 Proceedings of the conference on European design automation
Search space reduction through clustering in test generation
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Improving the Variable Ordering of OBDDs Is NP-Complete
IEEE Transactions on Computers
Implementation of an efficient parallel BDD package
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Compilation of optimized OBDD-algorithms
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MORE: an alternative implementation of BDD packages by multi-operand synthesis
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Interleaving based variable ordering methods for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Breadth-first manipulation of very large binary-decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Auxiliary variables for BDD-based representation and manipulation of Boolean functions
ACM Transactions on Design Automation of Electronic Systems (TODAES)
The Theory of Zero-Suppressed BDDs and the Number of Knight‘s Tours
Formal Methods in System Design
Behavioral synthesis of combinational logic using spectral-based heuristics
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Symbolic Protocol Verification with Queue BDDs
Formal Methods in System Design
OBDD Minimization Based on Two-Level Representation of Boolean Functions
IEEE Transactions on Computers
Streaming BDD manipulation for large-scale combinatorial problems
Proceedings of the conference on Design, automation and test in Europe
Restructuring logic representations with easily detectable simple disjunctive decompositions
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Low power optimization technique for BDD mapped circuits
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
The nonapproximability of OBDD minimization
Information and Computation
Ordered binary decision diagrams as knowledge-bases
Artificial Intelligence
Ordered binary decision diagrams
Logic Synthesis and Verification
IEEE Transactions on Computers
Data structures for Boolean functions
Computational Discrete Mathematics
Arithmetic Boolean Expression Manipulator Using BDDs
Formal Methods in System Design
Efficient Boolean Manipulation with OBDD's Can be Extended to FBDD's
IEEE Transactions on Computers
Integration, the VLSI Journal
Verifying integrity of decision diagrams
Integration, the VLSI Journal
Minimization of word-level decision diagrams
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Translation among CNFs, characteristic models and ordered binary decision diagrams
Information Processing Letters
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Efficient Minimization and Manipulation of Linearly Transformed Binary Decision Diagrams
IEEE Transactions on Computers
On variable ordering of binary decision diagrams for the application of multi-level logic synthesis
EURO-DAC '91 Proceedings of the conference on European design automation
Minimization of memory size for heterogeneous MDDs
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
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Electronic Notes in Theoretical Computer Science (ENTCS)
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SPIN '08 Proceedings of the 15th international workshop on Model Checking Software
Shared Ordered Binary Decision Diagrams for Dempster-Shafer Theory
ECSQARU '07 Proceedings of the 9th European Conference on Symbolic and Quantitative Approaches to Reasoning with Uncertainty
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IEICE - Transactions on Information and Systems
Scaling Search with Pattern Databases
Model Checking and Artificial Intelligence
Learning to order BDD variables in verification
Journal of Artificial Intelligence Research
Computation of signal output probability for Boolean functions represented by OBDD
Computers & Mathematics with Applications
Symbolic Reasoning with Weighted and Normalized Decision Diagrams
Electronic Notes in Theoretical Computer Science (ENTCS)
Questionnaire-driven configuration of reference process models
CAiSE'07 Proceedings of the 19th international conference on Advanced information systems engineering
Dynamically resizable binary decision diagrams
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FASE'08/ETAPS'08 Proceedings of the Theory and practice of software, 11th international conference on Fundamental approaches to software engineering
Linking domain models and process models for reference model configuration
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International Journal of Critical Computer-Based Systems
Estimation of the density of datasets with decision diagrams
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Genetic algorithms for the variable ordering problem of binary decision diagrams
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Computer Science Review
A Contribution to the Use of Decision Diagrams for Loading and Mining Transaction Databases
Fundamenta Informaticae - Special issue ISMIS'05
Multi-Core BDD Operations for Symbolic Reachability
Electronic Notes in Theoretical Computer Science (ENTCS)
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The efficiency of Boolean function manipulation depends on the form of representation of Boolean functions. Binary Decision Diagrams (BDD's) are graph representations proposed by Akers and Bryant. BDD's have some properties which can be used to enable efficient Boolean function manipulation.In this paper, we describe a technique of more efficient Boolean function manipulation that uses Shared Binary Decision Diagrams (SBDD's) with attributed edges. Our implements include an ordering algorithm of input variables and a method of handling don't care. We show experimental results produced by the implementation of the Boolean function manipulator.