Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Modified branching programs and their computational power
Modified branching programs and their computational power
Finding the Optimal Variable Ordering for Binary Decision Diagrams
IEEE Transactions on Computers
Using if-then-else DAGs for multi-level logic minimization
Proceedings of the decennial Caltech conference on VLSI on Advanced research in VLSI
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Sequential circuit verification using symbolic model checking
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Shared binary decision diagram with attributed edges for efficient Boolean function manipulation
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
Boolean Satisfiability and Equivalence Checking Using General Binary Decision Diagrams
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
The Complexity of Equivalence and Containment for Free Single Variable Program Schemes
Proceedings of the Fifth Colloquium on Automata, Languages and Programming
Synthesis for Testability: Binary Decision Diagrams
STACS '92 Proceedings of the 9th Annual Symposium on Theoretical Aspects of Computer Science
Frontiers of Feasible and Probabilistic Feasible Boolean Manipulation with Branching Programs
STACS '93 Proceedings of the 10th Annual Symposium on Theoretical Aspects of Computer Science
Analysis and Manipulation of Boolean Functions in Terms of Decision Graphs
WG '92 Proceedings of the 18th International Workshop on Graph-Theoretic Concepts in Computer Science
Verifying Temporal Properties of Sequential Machines Without Building their State Diagrams
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
DAC '94 Proceedings of the 31st annual Design Automation Conference
Binary decision diagrams and beyond: enabling technologies for formal verification
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
A lower bound for integer multiplication with read-once branching programs
STOC '95 Proceedings of the twenty-seventh annual ACM symposium on Theory of computing
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Reachability analysis using partitioned-ROBDDs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A Unifying Theoretical Background for Some Bdd-based Data Structures
Formal Methods in System Design
IEEE Transactions on Computers
On separating the read-k-times branching program hierarchy
STOC '98 Proceedings of the thirtieth annual ACM symposium on Theory of computing
Sampling schemes for computing OBDD variable orderings
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
The Theory of Zero-Suppressed BDDs and the Number of Knight‘s Tours
Formal Methods in System Design
Analysis of composition complexity and how to obtain smaller canonical graphs
Proceedings of the 37th Annual Design Automation Conference
Efficient manipulation algorithms for linearly transformed BDDs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Free MDD-based software optimization techniques for embedded systems
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Decomposable negation normal form
Journal of the ACM (JACM)
A Comparison of Free BDDs and Transformed BDDs
Formal Methods in System Design
The complexity of minimizing and learning OBDDs and FBDDs
Discrete Applied Mathematics
Integration, the VLSI Journal
The Complexity of Minimizing FBDDs
MFCS '99 Proceedings of the 24th International Symposium on Mathematical Foundations of Computer Science
MFCS '00 Proceedings of the 25th International Symposium on Mathematical Foundations of Computer Science
MFCS '02 Proceedings of the 27th International Symposium on Mathematical Foundations of Computer Science
BDD-Nodes Can Be More Expressive
ASIAN '99 Proceedings of the 5th Asian Computing Science Conference on Advances in Computing Science
Complexity Theoretical Results on Nondeterministic Graph-Driven Read-Once Branching Programs
STACS '03 Proceedings of the 20th Annual Symposium on Theoretical Aspects of Computer Science
BDD-Based Cryptanalysis of Keystream Generators
EUROCRYPT '02 Proceedings of the International Conference on the Theory and Applications of Cryptographic Techniques: Advances in Cryptology
A compiler for deterministic, decomposable negation normal form
Eighteenth national conference on Artificial intelligence
Information and Computation - Special issue: LICS'97
Information Processing Letters
Formal Verification of Combinational Circuit
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Decision Diagrams in Synthesis - Algorithms, Applications and Extensions
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Efficient Minimization and Manipulation of Linearly Transformed Binary Decision Diagrams
IEEE Transactions on Computers
BDDs: design, analysis, complexity, and applications
Discrete Applied Mathematics - Optimal discrete structure and algorithms (ODSA 2000)
Theoretical Computer Science
AND/OR search spaces for graphical models
Artificial Intelligence
Redundancy-free residual dispatch: using ordered binary decision diagrams for efficient dispatch
Proceedings of the 7th workshop on Foundations of aspect-oriented languages
Propositional fragments for knowledge compilation and quantified boolean formulae
AAAI'05 Proceedings of the 20th national conference on Artificial intelligence - Volume 1
Journal of Artificial Intelligence Research
Journal of Artificial Intelligence Research
A perspective on knowledge compilation
IJCAI'01 Proceedings of the 17th international joint conference on Artificial intelligence - Volume 1
DPLL with a trace: from SAT to knowledge compilation
IJCAI'05 Proceedings of the 19th international joint conference on Artificial intelligence
BDDs-design, analysis, complexity, and applications
Discrete Applied Mathematics
The computational complexity of equivalence and isomorphism problems
The computational complexity of equivalence and isomorphism problems
Knowledge compilation meets database theory: compiling queries to decision diagrams
Proceedings of the 14th International Conference on Database Theory
SDD: a new canonical representation of propositional knowledge bases
IJCAI'11 Proceedings of the Twenty-Second international joint conference on Artificial Intelligence - Volume Volume Two
Knowledge compilation for model counting: affine decision trees
IJCAI'13 Proceedings of the Twenty-Third international joint conference on Artificial Intelligence
Hi-index | 14.99 |
OBDD's are the state-of-the-art data structure for Boolean function manipulation. Basic tasks of Boolean manipulation such as equivalence test, satisfiability test, tautology test and single Boolean synthesis steps can be performed efficiently in terms of fixed ordered OBDD's. The bottleneck of most OBDD-applications is the size of the represented Boolean functions since the total computation merely remains tractable as long as the OBDD-representations remain of reasonable size. Since it is well known that OBDD's are restricted FBDD's (free BDD's, i.e., BDD's that test, on each path, each input variable at most once), and that FBDD-representations are often much more (sometimes even exponentially more) concise than OBDD-representations. We propose to work with a more general FBDD-based data structure. We show that FBDD's of a fixed type provide, similar as OBDD's of a fixed variable ordering, canonical representations of Boolean functions, and that basic tasks of Boolean manipulation can be performed in terms of fixed typed FBDD's similarly efficient as in terms of fixed ordered OBDD's. In order to demonstrate the power of the FBDD-concept we show that the verification of the circuit design for the hidden weighted bit function proposed Bryant can be carried out efficiently in terms of FBDD's while this is, for principal reasons, impossible in terms of OBDD's.