Programming and verifying critical systems by means of the synchronous data-flow language LUSTRE
SIGSOFT '91 Proceedings of the conference on Software for citical systems
Formal hardware verification by symbolic ternary trajectory evaluation
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Representing circuits more efficiently in symbolic model checking
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
Programming and Verifying Real-Time Systems by Means of the Synchronous Data-Flow Language LUSTRE
IEEE Transactions on Software Engineering - Special issue: specification and analysis of real-time systems
Validating discrete event simulations using event pattern mappings
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Exact calculation of synchronization sequences based on binary decision diagrams
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Comparative design validation based on event pattern mappings
DAC '93 Proceedings of the 30th international Design Automation Conference
Model checking and modular verification
ACM Transactions on Programming Languages and Systems (TOPLAS)
An efficient verification algorithm for parallel controllers
EURO-DAC '94 Proceedings of the conference on European design automation
Verification techniques for cache coherence protocols
ACM Computing Surveys (CSUR)
Synchronous parallel controller synthesis from behavioural multiple-process VHDL description
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Derivation of formal representations from process-based specification and implementation models
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Efficient state classification of finite state Markov chains
DAC '98 Proceedings of the 35th annual Design Automation Conference
ACM Transactions on Programming Languages and Systems (TOPLAS)
Efficient verification using generalized partial order analysis
Proceedings of the conference on Design, automation and test in Europe
Verification of Large State/Event Systems Using Compositionality and Dependency Analysis
Formal Methods in System Design
Dynamic detection and removal of inactive clauses in SAT with application in image computation
Proceedings of the 38th annual Design Automation Conference
Bounded Model Checking Using Satisfiability Solving
Formal Methods in System Design
Refining Model Checking by Abstract Interpretation
Automated Software Engineering
Another Look at LTL Model Checking
Formal Methods in System Design
A Scalable Parallel Algorithm for Reachability Analysis of Very Large Circuits
Formal Methods in System Design
Efficient Boolean Manipulation with OBDD's Can be Extended to FBDD's
IEEE Transactions on Computers
Generalized Symbolic Trajectory Evaluation - Abstraction in Action
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Performance Analysis of Asynchronous Circuits Using Markov Chains
Concurrency and Hardware Design, Advances in Petri Nets
Verifiying Safety Properties of a Power PC Microprocessor Using Symbolic Model Checking without BDDs
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Model Checking: Historical Perspective and Example (Extended Abstract)
TABLEAUX '98 Proceedings of the International Conference on Automated Reasoning with Analytic Tableaux and Related Methods
Improved sequential ATPG using functional observation information and new justification methods
EDTC '95 Proceedings of the 1995 European conference on Design and Test
25 Years of Model Checking
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