Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Verifying Temporal Properties of Sequential Machines Without Building their State Diagrams
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Fast Sequential ATPG Based on Implicit State Enumeration
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
HITEC: a test generation package for sequential circuits
EURO-DAC '91 Proceedings of the conference on European design automation
Dynamic state traversal for sequential circuit test generation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Sequential Circuit Test Generation Using Dynamic State Traversal
EDTC '97 Proceedings of the 1997 European conference on Design and Test
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
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Sequential ATPG (Automatic Test Pattern Generation) is a very desirable CAD tool, but to date, the site and complexity of circuits for which sequential ATPG could be performed has been limited. We have discovered a method for collecting functional information which makes fault observation significantly easier. We also propose a new method for state justification which is a combination of function-based methods and structure-based methods. Our sequential ATPG system deals with circuits without a reset state or a synchronizing sequence, and the experimental results show that the proposed method achieves significant improvements over existing sequential ATPG methods.