Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Sequential circuit verification using symbolic model checking
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Efficient partial enumeration for timing analysis of asynchronous systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Verification of asynchronous circuits using time Petri net unfolding
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Derivation of formal representations from process-based specification and implementation models
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Symbolic Model Checking
Petri Net Theory and the Modeling of Systems
Petri Net Theory and the Modeling of Systems
Evaluating Deadlock Detection Methods for Concurrent Software
IEEE Transactions on Software Engineering
Partial-Order Reduction in Symbolic State Space Exploration
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
A Stubborn Attack On State Explosion
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Verifying Temporal Properties of Sequential Machines Without Building their State Diagrams
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Parallel systems specitications with coloured Petri nets and algebraic specifications
Advances in Petri Nets 1987, covers the 7th European Workshop on Applications and Theory of Petri Nets
Refining Dependencies Improves Partial-Order Verification Methods (Extended Abstract)
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Petri Net Analysis Using Boolean Manipulation
Proceedings of the 15th International Conference on Application and Theory of Petri Nets
Using Partial Orders for the Efficient Verification of Deadlock Freedom and Safety Properties
CAV '91 Proceedings of the 3rd International Workshop on Computer Aided Verification
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This paper presents a new formal method for the efficient verification of concurrent systems that are modeled using a safe Petri net representation. Our method generalizes upon partial-order methods to explore concurrently enabled conflicting paths simultaneously. We show that our method can achieve an exponential reduction in algorithmic complexity without resorting to an implicit enumeration approach.