The complexity of propositional linear temporal logics
Journal of the ACM (JACM)
“Sometimes” and “not never” revisited: on branching versus linear time temporal logic
Journal of the ACM (JACM) - The MIT Press scientific computation series
Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Information Processing Letters
Modalities for model checking (extended abstract): branching time strikes back
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Checking that finite state concurrent programs satisfy their linear specification
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Symbolic Model Checking
Verifying Temporal Properties of Sequential Machines Without Building their State Diagrams
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Expressibility results for linear-time and branching-time logics
Linear Time, Branching Time and Partial Order in Logics and Models for Concurrency, School/Workshop
Verification Tools for Finite-State Concurrent Systems
A Decade of Concurrency, Reflections and Perspectives, REX School/Symposium
Verification of the Futurebus+ Cache Coherence Protocol
CHDL '93 Proceedings of the 11th IFIP WG10.2 International Conference sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC on Computer Hardware Description Languages and their Applications
Selective Quantitative Analysis and Interval Model Checking: Verifying Different Facets of a System
Formal Methods in System Design
The complexity of propositional linear temporal logics in simple cases
Information and Computation
Multiple State and Single State Tableaux for Combining Local and Global Model Checking
Correct System Design, Recent Insight and Advances, (to Hans Langmaack on the occasion of his retirement from his professorship at the University of Kiel)
Input Elimination and Abstraction in Model Checking
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Model Checking: A Tutorial Overview
MOVEP '00 Proceedings of the 4th Summer School on Modeling and Verification of Parallel Processes
Integrating BDD-Based and SAT-Based Symbolic Model Checking
FroCoS '02 Proceedings of the 4th International Workshop on Frontiers of Combining Systems
NUSMV: A New Symbolic Model Verifier
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Combining Symmetry Reduction and Under-Approximation for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
A Theory of Consistency for Modular Synchronous Systems
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Model checking: a tutorial overview
Modeling and verification of parallel processes
Handbook of automated reasoning
Formal Verification Using Bounded Model Checking: SAT versus Sequential ATPG Engines
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Model Checking with Strong Fairness
Formal Methods in System Design
Combining symmetry reduction and under-approximation for symbolic model checking
Formal Methods in System Design
GSTE is partitioned model checking
Formal Methods in System Design
Simulation-based verification using Temporally Attributed Boolean Logic
ACM Transactions on Design Automation of Electronic Systems (TODAES)
MC-SOG: An LTL Model Checker Based on Symbolic Observation Graphs
PETRI NETS '08 Proceedings of the 29th international conference on Applications and Theory of Petri Nets
On Regular Temporal Logics with Past,
ICALP '09 Proceedings of the 36th Internatilonal Collogquium on Automata, Languages and Programming: Part II
Automata-theoretic model checking revisited
VMCAI'07 Proceedings of the 8th international conference on Verification, model checking, and abstract interpretation
Bounded model checking for past LTL
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
A visual editor to support the use of temporal logic for ADL monitoring
ICOST'07 Proceedings of the 5th international conference on Smart homes and health telematics
Boolean abstraction for temporal logic satisfiability
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Proceedings of the 14th international SPIN conference on Model checking software
From LTL to symbolically represented deterministic automata
VMCAI'08 Proceedings of the 9th international conference on Verification, model checking, and abstract interpretation
Authoring and verification of clinical guidelines: A model driven approach
Journal of Biomedical Informatics
Making prophecies with decision predicates
Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Combining partial-order reduction and symbolic model checking to verify LTL properties
NFM'11 Proceedings of the Third international conference on NASA Formal methods
Milestones: a model checker combining symbolic model checking and partial order reduction
NFM'11 Proceedings of the Third international conference on NASA Formal methods
A multi-encoding approach for LTL symbolic satisfiability checking
FM'11 Proceedings of the 17th international conference on Formal methods
Evaluating LTL satisfiability solvers
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Symbolic implementation of alternating automata
CIAA'06 Proceedings of the 11th international conference on Implementation and Application of Automata
Towards a notion of unsatisfiable cores for LTL
FSEN'09 Proceedings of the Third IPM international conference on Fundamentals of Software Engineering
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Shortest counterexamples for symbolic model checking of LTL with past
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Incremental and complete bounded model checking for full PLTL
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Symbolic systems, explicit properties: on hybrid approaches for LTL symbolic model checking
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Towards a notion of unsatisfiable and unrealizable cores for LTL
Science of Computer Programming
Survey: Linear Temporal Logic Symbolic Model Checking
Computer Science Review
Temporal logic model checking in alloy
ABZ'12 Proceedings of the Third international conference on Abstract State Machines, Alloy, B, VDM, and Z
International Journal of Intelligent Information Technologies
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We show how LTL model checking can be reduced to CTLmodel checking with fairness constraints. Using this reduction, wealso describe how to construct a {\em symbolic} LTL model checker thatappears to be quite efficient in practice. In particular, we show howthe SMV model checking system developed by McMillan[16] can be extended to permit LTL specifications.The results that we have obtained are quite surprising. For thespecifications which can be expressed in both CTL and LTL, the LTL modelchecker required at most twice as much time and space as the CTL modelchecker. We also succeeded in verifying non-trivial LTL specifications.The amount of time and space that is required is quite reasonable.Based on the examples that we considered, it appears that efficient LTLmodel checking is possible when the specifications are not excessivelycomplicated.