The complexity of propositional linear temporal logics
Journal of the ACM (JACM)
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
On the synthesis of a reactive module
POPL '89 Proceedings of the 16th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Handbook of theoretical computer science (vol. B)
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Reasoning about infinite computations
Information and Computation
Efficient Detection of Vacuity in Temporal Model Checking
Formal Methods in System Design - Special issue on CAV '97
Another Look at LTL Model Checking
Formal Methods in System Design
Improving Automata Generation for Linear Temporal Logic by Considering the Automaton Hierarchy
LPAR '01 Proceedings of the Artificial Intelligence on Logic for Programming
Simple on-the-fly automatic verification of linear temporal logic
Proceedings of the Fifteenth IFIP WG6.1 International Symposium on Protocol Specification, Testing and Verification XV
From States to Transitions: Improving Translation of LTL Formulae to Büchi Automata
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
On-the-Fly Verification of Linear Temporal Logic
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume I - Volume I
Improved Automata Generation for Linear Temporal Logic
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Efficient Büchi Automata from LTL Formulae
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Fast LTL to Büchi Automata Translation
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Memory Efficient Algorithms for the Verification of Temporal Properties
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
A Decision Algorithm for Full Propositional Temporal Logic
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
BDD-Based Decision Procedures for K
CADE-18 Proceedings of the 18th International Conference on Automated Deduction
SPOT: An Extensible Model Checking Library Using Transition-Based Generalized Büchi Automata
MASCOTS '04 Proceedings of the The IEEE Computer Society's 12th Annual International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems
Design for Verification of SystemC Transaction Level Models
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Formal analysis of hardware requirements
Proceedings of the 43rd annual Design Automation Conference
From PSL to NBA: a Modular Symbolic Encoding
FMCAD '06 Proceedings of the Formal Methods in Computer Aided Design
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
A Framework for Inherent Vacuity
HVC '08 Proceedings of the 4th International Haifa Verification Conference on Hardware and Software: Verification and Testing
Minimal Büchi Automata for Certain Classes of LTL Formulas
DEPCOS-RELCOMEX '09 Proceedings of the 2009 Fourth International Conference on Dependability of Computer Systems
Automata-theoretic model checking revisited
VMCAI'07 Proceedings of the 8th international conference on Verification, model checking, and abstract interpretation
Syntactic optimizations for PSL verification
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
Proceedings of the 14th international SPIN conference on Model checking software
Antichains: alternative algorithms for LTL satisfiability and model-checking
TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
Tableau Tool for Testing Satisfiability in LTL: Implementation and Experimental Analysis
Electronic Notes in Theoretical Computer Science (ENTCS)
Treewidth in verification: local vs. global
LPAR'05 Proceedings of the 12th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
An analysis of SAT-based model checking techniques in an industrial environment
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Evaluating LTL satisfiability solvers
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
| Hi-index | 0.00 |
Formal behavioral specifications written early in the system-design process and communicated across all design phases have been shown to increase the efficiency, consistency, and quality of the system under development. To prevent introducing design or verification errors, it is crucial to test specifications for satisfiability. Our focus here is on specifications expressed in linear temporal logic (LTL). We introduce a novel encoding of symbolic transition-based Büchi automata and a novel, "sloppy," transition encoding, both of which result in improved scalability. We also define novel BDD variable orders based on tree decomposition of formula parse trees. We describe and extensively test a new multi-encoding approach utilizing these novel encoding techniques to create 30 encoding variations. We show that our novel encodings translate to significant, sometimes exponential, improvement over the current standard encoding for symbolic LTL satisfiability checking.