Trace theory for automatic hierarchical verification of speed-independent circuits
Trace theory for automatic hierarchical verification of speed-independent circuits
Model checking, abstraction, and compositional verification
Model checking, abstraction, and compositional verification
Model checking
Formal verification of an IBM CoreConnect processor local bus arbiter core
Proceedings of the 37th Annual Design Automation Conference
The Definition of Standard ML
Another Look at LTL Model Checking
Formal Methods in System Design
Executable Protocol Specification in ESL
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Monitor-Based Formal Specification of PCI
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Executable Protocol Specification in ESL
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Monitor-Based Formal Specification of PCI
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
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We propose a model for modular synchronous systems with combinationM dependencies and define consistency using this model. We then show how to derive this model from a modular specification where individual modules are specified as Kripke Structures and give an Mgorithm to check the system for consistency. We have implemented this Mgorithm symbolicMly using BDDs in a tool, SpecCheck. We have used this tool to check an example bus protocol derived from an industrial specification. The counterexamples obtained for this protocol highlight the need for consistency checking.