Mechanically Verifying Concurrent Programs with the Boyer-Moore Prove
IEEE Transactions on Software Engineering
Timing verification using HDTV
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Model checking and abstraction
POPL '92 Proceedings of the 19th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
On the Delay-Sensitivity of Gate Networks
IEEE Transactions on Computers
Recurrence equations and the optimization of synchronous logic circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
An efficient critical race-free state assignment technique for asynchronous finite state machines
DAC '93 Proceedings of the 30th international Design Automation Conference
Model checking and modular verification
ACM Transactions on Programming Languages and Systems (TOPLAS)
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
The complexity of verification
STOC '94 Proceedings of the twenty-sixth annual ACM symposium on Theory of computing
Hierarchical optimization of asynchronous circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Abstract interpretation of reactive systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Efficient verification of determinate speed-independent circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Modeling hierarchical combinational circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Semantics and verification of action diagrams with linear timing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Asynchronous interface specification, analysis and synthesis
DAC '98 Proceedings of the 35th annual Design Automation Conference
Deriving Petri Nets from Finite Transition Systems
IEEE Transactions on Computers
Verification of asynchronous interface circuits with bounded wire delays
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Automatic gate-level synthesis of speed-independent circuits
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Symbolic Protocol Verification with Queue BDDs
Formal Methods in System Design
Formal Methods in System Design - Special issue on The First Federated Logic Conference (FLOC'96), part II
Delay-Insensitivity and Semi-Modularity
Formal Methods in System Design
A methodology for correct-by-construction latency insensitive design
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Conformance and mirroring for timed asychronous circuits
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Design of embedded systems: formal models, validation, and synthesis
Readings in hardware/software co-design
Distributed simulation of asynchronous hardware: the program driven synchronization protocol
Journal of Parallel and Distributed Computing
Alternating-time temporal logic
Journal of the ACM (JACM)
A Mechanization of Unity in PC-NQTHM-92
Journal of Automated Reasoning
Combining Software and Hardware Verification Techniques
Formal Methods in System Design
The Counterflow Pipeline Processor Architecture
IEEE Design & Test
Specification and Validation of Control-Intensive IC's in hopCP
IEEE Transactions on Software Engineering
True Concurrency in Models of Asynchronous Circuit Behavior
Formal Methods in System Design
An Assume-Guarantee Rule for Checking Simulation
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Executable Protocol Specification in ESL
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Monitor-Based Formal Specification of PCI
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Synthesis of Uninitialized Systems
ICALP '02 Proceedings of the 29th International Colloquium on Automata, Languages and Programming
Metrics for Labeled Markov Systems
CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
CONCUR '00 Proceedings of the 11th International Conference on Concurrency Theory
Compositional Methods for Probabilistic Systems
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
Hazard-Freedom Checking in Speed-Independent Systems
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Alternating-Time Temporal Logic
COMPOS'97 Revised Lectures from the International Symposium on Compositionality: The Significant Difference
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Formally-Based Design Evaluation
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Interface Theories for Component-Based Design
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
EMSOFT '02 Proceedings of the Second International Conference on Embedded Software
Decomposition in Asynchronous Circuit Design
FST TCS '02 Proceedings of the 22nd Conference Kanpur on Foundations of Software Technology and Theoretical Computer Science
HSCC '01 Proceedings of the 4th International Workshop on Hybrid Systems: Computation and Control
Concurrency and Hardware Design, Advances in Petri Nets
Decomposition in Asynchronous Circuit Design
Concurrency and Hardware Design, Advances in Petri Nets
Error Detection with Directed Symbolic Model Checking
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume I - Volume I
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Automatic Abstraction for Verification of Timed Circuits and Systems
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Conformance Checking for Models of Asynchronous Message Passing Software
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Synchronous and Bidirectional Component Interfaces
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Interface Compatibility Checking for Software Modules
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
A Theory of Consistency for Modular Synchronous Systems
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Relative liveness: from intuition to automated verification
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Hierarchical gate-level verification of speed-independent circuits
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Some Limitations to Speed-Independence in Asynchronous Circuits
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Control Resynthesis for Control-Dominated Asynchronous Designs
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Using Partial Orders For Trace Theoretic Verification Of Asynchronous Circuits
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Analysis and Applications of the XDI model
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Timed Trace Theoretic Verification Using Partial Order Reduction
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
An Analysis of Determinacy Using a Trace-Theoretic Model of Asynchronous Circuits
ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems
Modeling and optimization of hierarchical synchronous circuits
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Symbolic Protocol Verification with Queue BDDs
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Concurrent Omega-Regular Games
LICS '00 Proceedings of the 15th Annual IEEE Symposium on Logic in Computer Science
Deterministic generators and games for Ltl fragments
ACM Transactions on Computational Logic (TOCL)
Modelling and verification of delay-insensitive circuits using CCS and the concurrency workbench
Information Processing Letters
Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Conservative approximations for heterogeneous design
Proceedings of the 4th ACM international conference on Embedded software
A formal approach to designing delay-insensitive circuits
Distributed Computing
Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllers
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
Games in system design and verification
TARK '05 Proceedings of the 10th conference on Theoretical aspects of rationality and knowledge
Automatic Synthesis of Composable Sequential Quantum Boolean Circuits
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
SAT based solutions for consistency problems in formal property specifications for open systems
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Test generation games from formal specifications
Proceedings of the 43rd annual Design Automation Conference
Sensor, Filter, and Fusion Models with Rough Petri Nets
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P'2000)
Component refinement and CSC-solving for STG decomposition
Theoretical Computer Science
Controllable Delay-Insensitive Processes
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
On Process-algebraic Verification of Asynchronous Circuits
Fundamenta Informaticae - Half a Century of Inspirational Research: Honoring the Scientific Influence of Antoni Mazurkiewicz
Multiple Viewpoint Contract-Based Specification and Design
Formal Methods for Components and Objects
Hazard Checking of Timed Asynchronous Circuits Revisited
Fundamenta Informaticae - Application of Concurrency to System Design, the Sixth Special Issue
A Conservative Framework for Safety-Failure Checking
IEICE - Transactions on Information and Systems
Opportunities and Challenges in Process-algebraic Verification of Asynchronous Circuit Designs
Electronic Notes in Theoretical Computer Science (ENTCS)
Hardware and Petri nets: application to asynchronous circuit design
ICATPN'00 Proceedings of the 21st international conference on Application and theory of petri nets
ICALP'03 Proceedings of the 30th international conference on Automata, languages and programming
Branching vs. linear time: semantical perspective
ATVA'07 Proceedings of the 5th international conference on Automated technology for verification and analysis
Modular inference of subprogram contracts for safety checking
Journal of Symbolic Computation
Models of reactive systems: communication, concurrency, and causality
MBEERTS'07 Proceedings of the 2007 International Dagstuhl conference on Model-based engineering of embedded real-time systems
Synthesis of trigger properties
LPAR'10 Proceedings of the 16th international conference on Logic for programming, artificial intelligence, and reasoning
Qualitative concurrent parity games
ACM Transactions on Computational Logic (TOCL)
A Theory of Synchronous Relational Interfaces
ACM Transactions on Programming Languages and Systems (TOPLAS)
Constructing replaceable services using operating guidelines and maximal controllers
WS-FM'10 Proceedings of the 7th international conference on Web services and formal methods
Soundness-preserving refinements of service compositions
WS-FM'10 Proceedings of the 7th international conference on Web services and formal methods
A low latency asynchronous arbitration circuit
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Functional term rewriting systems towards symbolic model-checking
International Journal of Critical Computer-Based Systems
An O(n2) time algorithm for alternating Büchi games
Proceedings of the twenty-third annual ACM-SIAM symposium on Discrete Algorithms
A survey of stochastic ω-regular games
Journal of Computer and System Sciences
Algorithms for omega-regular games with imperfect information
CSL'06 Proceedings of the 20th international conference on Computer Science Logic
Safraless compositional synthesis
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
Component refinement and CSC solving for STG decomposition
FOSSACS'05 Proceedings of the 8th international conference on Foundations of Software Science and Computation Structures
Recent challenges and ideas in temporal synthesis
SOFSEM'12 Proceedings of the 38th international conference on Current Trends in Theory and Practice of Computer Science
JSD = Δ CSP ⊕ TLZ: a case study
Methods'96 Proceedings of the 1996 international conference on Methods Integration
Robustness of structurally equivalent concurrent parity games
FOSSACS'12 Proceedings of the 15th international conference on Foundations of Software Science and Computational Structures
Partial-Observation Stochastic Games: How to Win When Belief Fails
LICS '12 Proceedings of the 2012 27th Annual IEEE/ACM Symposium on Logic in Computer Science
Fundamenta Informaticae - Application of Concurrency to System Design, the Eighth Special Issue
Hazard Checking of Timed Asynchronous Circuits Revisited
Fundamenta Informaticae - Application of Concurrency to System Design, the Sixth Special Issue
Controllable Delay-Insensitive Processes
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
On Process-algebraic Verification of Asynchronous Circuits
Fundamenta Informaticae - Half a Century of Inspirational Research: Honoring the Scientific Influence of Antoni Mazurkiewicz
Sensor, Filter, and Fusion Models with Rough Petri Nets
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P'2000)
CONCUR'07 Proceedings of the 18th international conference on Concurrency Theory
Revisiting timed specification theories: a linear-time perspective
FORMATS'12 Proceedings of the 10th international conference on Formal Modeling and Analysis of Timed Systems
HVC'11 Proceedings of the 7th international Haifa Verification conference on Hardware and Software: verification and testing
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