The complexity of propositional linear temporal logics
Journal of the ACM (JACM)
On the synthesis of a reactive module
POPL '89 Proceedings of the 16th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Trace theory for automatic hierarchical verification of speed-independent circuits
Trace theory for automatic hierarchical verification of speed-independent circuits
Reasoning about infinite computations
Information and Computation
A Deductive Approach to Program Synthesis
ACM Transactions on Programming Languages and Systems (TOPLAS)
Automata on Infinite Objects and Church's Problem
Automata on Infinite Objects and Church's Problem
Introduction To Automata Theory, Languages, And Computation
Introduction To Automata Theory, Languages, And Computation
Latch Redundancy Removal Without Global Reset
ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
Realizable and Unrealizable Specifications of Reactive Systems
ICALP '89 Proceedings of the 16th International Colloquium on Automata, Languages and Programming
The Verifiacation Problem for Safe Replaceability
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Synthesis of communicating processes from temporal logic specifications
Synthesis of communicating processes from temporal logic specifications
On the complexity of omega -automata
SFCS '88 Proceedings of the 29th Annual Symposium on Foundations of Computer Science
On locally checkable properties
LPAR'06 Proceedings of the 13th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
A survey of stochastic ω-regular games
Journal of Computer and System Sciences
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The sequential synthesis problem, which is closely related to Church's solvability problem, asks, given a specification in the form of a binary relation between input and output streams, for the construction of a finite-state stream transducer that converts inputs to appropriate outputs. For efficiency reasons, practical sequential hardware is often designed to operate without prior initialization. Such hardware designs can be modeled by uninitialized state machines, which are required to satisfy their specification if started from any state. In this paper we solve the sequential synthesis problem for uninitialized systems, that is, we construct uninitialized finite-state stream transducers. We consider specifications given by LTL formulas, deterministic, nondeterministic, universal, and alternating B眉chi automata. We solve this uninitialized synthesis problem by reducing it to the well-understood initialized synthesis problem. While our solution is straightforward, it leads, for some specification formalisms, to upper bounds that are exponentially worse than the complexity of the corresponding initialized problems. However, we prove lower bounds to show that our simple solutions are optimal for all considered specification formalisms. We also study the problem of deciding whether a given specification is uninitialized, that is, if its uninitialized and initialized synthesis problems coincide. We show that this problem has, for each specification formalism, the same complexity as the equivalence problem.