Sequential optimisation without state space exploration
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
An implicit algorithm for finding steady states and its application to FSM verification
DAC '98 Proceedings of the 35th annual Design Automation Conference
Implicit enumeration of strongly connected components
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
FILL and FUNI: algorithms to identify illegal states and sequentially untestable faults
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Synthesis of Uninitialized Systems
ICALP '02 Proceedings of the 29th International Colloquium on Automata, Languages and Programming
Sequential optimization in the absence of global reset
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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For circuits where there may be latches with no reset line, we show how to replace some of them with combinational logic. All previous work in sequential optimization by latch removal assumes a designated initial state. Without this assumption, the design can power up in any state and earlier techniques are not applicable. We present an algorithm for identifying and replacing redundant latches by combinational logic such that no environment of the design can detect the change. The new design preserves the steady state behavior as well as all initializing sequences of the old design. We report experimental results on benchmark circuits and demonstrate savings in area without adverse impact on delay. Keywords: Finite state machine, global reset assumption, latch redundancy, safe replacement, delayed replacement, strongly connected components, core