Communicating sequential processes
Communicating sequential processes
Trace theory for automatic hierarchical verification of speed-independent circuits
Trace theory for automatic hierarchical verification of speed-independent circuits
Stubborn sets for reduced state generation
APN 90 Proceedings on Advances in Petri nets 1990
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
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Acta Informatica
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Automatic gate-level synthesis of speed-independent circuits
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Symbolic Model Checking
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Algorithms for Synthesis and Testing of Asynchronous Circuits
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An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems
IEEE Transactions on Computers
UCLOCK: Automated Design of High-Peformance Unclocked State Machines
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Structural methods for the synthesis of speed-independent circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Decomposition and technology mapping of speed-independent circuits using Boolean relations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Fundamenta Informaticae - Application of Concurrency to System Design, the Sixth Special Issue
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Fundamenta Informaticae - Application of Concurrency to System Design
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ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Synthesis of Petri Nets from Term Based Representations of Infinite Partial Languages
Fundamenta Informaticae - Application of Concurrency to System Design
Synthesis of Petri Nets from Finite Partial Languages
Fundamenta Informaticae - Application of Concurrency to System Design, the Sixth Special Issue
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Asynchronous circuits is a discipline in which the theory of concurrency is applied to hardware design. This paper presents an overview of a design framework in which Petri nets are used as the main behavioral model for specification. Techniques for synthesis, analysis and formal verification of asynchronous circuits are reviewed and discussed.