Translating programs into delay-insensitive circuits
Translating programs into delay-insensitive circuits
Communication and concurrency
Trace theory for automatic hierarchical verification of speed-independent circuits
Trace theory for automatic hierarchical verification of speed-independent circuits
The limitations to delay-insensitivity in asynchronous circuits
AUSCRYPT '90 Proceedings of the sixth MIT conference on Advanced research in VLSI
A unified signal transition graph model for asynchronous control circuit synthesis
Formal Methods in System Design
Delay-insensitivity and ternary simulation
Theoretical Computer Science
Introduction to VLSI Systems
True Concurrency in Models of Asynchronous Circuit Behavior
Formal Methods in System Design
Representation of a class of nondeterministic semiautomata by canonical words
Theoretical Computer Science - In honour of Professor Christian Choffrut on the occasion of his 60th birthday
Semantic quality attributes for big-step modelling languages
FASE'11/ETAPS'11 Proceedings of the 14th international conference on Fundamental approaches to software engineering: part of the joint European conferences on theory and practice of software
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The study of asynchronous circuit behaviors in the presenceof component and wire delays has received a great deal of attention.In this paper, we consider asynchronous circuits whose components canbe any non-deterministic sequential machines of the Moore type, anddescribe a formal model for these circuits and their behaviors underthe inertial delay model.We model an asynchronous circuit C by a networkN of modules with delaysassociated with its components and/or wires. We compute the behavior ofNassuming arbitrary inertial delays in the modules, and take this behavior tobe correct. We define N to be strongly delay-insensitive ifits behavior remains correct in the presence of arbitrary stray delays,where correctness is defined through the notion of observational equivalence(or bisimulation), one of the strongest forms of behavioral equivalence. Weintroduce the notion of quasi semi-modularity, which generalizesMuller's definitionof semi-modularity to non-deterministic networks. We prove that a circuit,with all the wire delays taken into account, isstrongly delay-intensitive if and only if its behavior is quasisemi-modular.