The VLSI Complexity of Selected Graph Problems
Journal of the ACM (JACM)
ACM Computing Surveys (CSUR)
Parallel algorithms for data compression
Journal of the ACM (JACM)
CIRCAL and the representation of communication, concurrency, and time
ACM Transactions on Programming Languages and Systems (TOPLAS) - Lecture notes in computer science Vol. 174
A model of computation for VLSI with related complexity results
Journal of the ACM (JACM)
Modeling concepts for VLSI CAD objects
ACM Transactions on Database Systems (TODS)
System architectures for computer music
ACM Computing Surveys (CSUR)
DFSP: A Data Flow Signal Processor
IEEE Transactions on Computers
Proving systolic systems correct
ACM Transactions on Programming Languages and Systems (TOPLAS) - The MIT Press scientific computation series
Designing systolic algorithms using sequential machines
IEEE Transactions on Computers - The MIT Press scientific computation series
Routing multiterminal nets around a rectangle
IEEE Transactions on Computers - The MIT Press scientific computation series
IEEE Transactions on Computers
Lower Overhead Design for Testability of Programmable Logic Arrays
IEEE Transactions on Computers - The MIT Press scientific computation series
Geometry of planar graphs with angles
SCG '86 Proceedings of the second annual symposium on Computational geometry
Automatic Verification of Sequential Circuits Using Temporal Logic
IEEE Transactions on Computers
IEEE Transactions on Computers
Survey on special purpose computer architectures for AI
ACM SIGART Bulletin
Clocking Schemes for High-Speed Digital Systems
IEEE Transactions on Computers
AT2 = O(N log4 N), T = O(log N) fast Fourier transform in a light connected 3-dimensional VLSI
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Microcode development for microprogrammed processors
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
JAM—just another microsequencer
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
Associative table lookup processing for multioperand residue arithmetic
Journal of the ACM (JACM)
Evaluation of On-Chip Static Interconnection Networks
IEEE Transactions on Computers
The application accelerator illustration system
OOPLSA '86 Conference proceedings on Object-oriented programming systems, languages and applications
Efficient embeddings of binary trees in VLSI arrays
IEEE Transactions on Computers
Organization and analysis of a gracefully-degrading interleaved memory system
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
A New Approach to the Design of Testable PLA's
IEEE Transactions on Computers
IEEE Transactions on Computers
A VLSI Implementation of the Simplex Algorithm
IEEE Transactions on Computers
A Way to Build Efficient Carry-Skip Adders
IEEE Transactions on Computers
Reconfigurable Tree Architectures Using Subtree Oriented Fault Tolerance
IEEE Transactions on Computers
Finite Field Fault-Tolerant Digital Filtering Architectures
IEEE Transactions on Computers
A Fast 1-D Serial-Parallel Systolic Multiplier
IEEE Transactions on Computers
An improved systematic method for constructing systolic arrays from algorithms
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Abstract routing of logic networks for custom module generation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Switch directed dynamic causal networks—a paradigm for electronic system diagnosis
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
An automated design of minimum-area IC power/ground nets
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
KAHLUA: a hierarchical circuit disassembler
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
VISION: VHDL induced schematic imaging on net-lists
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
A new compaction scheme based on compression ridges
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
INSIST: Interactive Simulation in Smalltalk
OOPSLA '87 Conference proceedings on Object-oriented programming systems, languages and applications
VLSI Architectures for multidimensional fourier transform processing
IEEE Transactions on Computers
Architectural Yield Optimization for WSI
IEEE Transactions on Computers
The Cubical Ring Connected Cycles: A Fault Tolerant Parallel Computation Network
IEEE Transactions on Computers
A Generalized Message-Passing Mechanism for Communicating Sequential Processes
IEEE Transactions on Computers
A New Bit-Serial Systolic Multiplier Over GF(2/sup m/)
IEEE Transactions on Computers
On the Design of Pseudoexhaustive Testable PLAs
IEEE Transactions on Computers - Fault-Tolerant Computing
A linear time algorithm for optimal routing around a rectangle
Journal of the ACM (JACM)
An Algebraic Model for Asynchronous Circuits Verification
IEEE Transactions on Computers
The Generalized Gabor Scheme of Image Representation in Biological and Machine Vision
IEEE Transactions on Pattern Analysis and Machine Intelligence
A Multilevel Parallel Processing Approach to Scene Labeling Problems
IEEE Transactions on Pattern Analysis and Machine Intelligence
ACM Transactions on Graphics (TOG)
Q-Modules: Internally Clocked Delay-Insensitive Modules
IEEE Transactions on Computers
Modular Error Detection for Bit-Serial Multiplication
IEEE Transactions on Computers
TRAM: A Design Methodology for High-Performance, Easily Testable, Multimegabit RAMs
IEEE Transactions on Computers
Analysis of bus hierarchies for multiprocessors
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Synthesizing Linear Array Algorithms from Nested FOR Loop Algorithms
IEEE Transactions on Computers
DVPP: a VLSI dynamic-graph ensemble machine
ICS '88 Proceedings of the 2nd international conference on Supercomputing
Design methods of electron beam sensitive devices in NMOS and CMOS technologies
Microelectronic Engineering
ACM SIGMICRO Newsletter
ACM SIGMICRO Newsletter
Energy consumption in VLSI circuits
STOC '88 Proceedings of the twentieth annual ACM symposium on Theory of computing
Finite-grain message passing concurrent computers
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
Performance analysis of the hypercube line switch
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
25 years of DAC Papers on Twenty-five years of electronic design automation
MOSSIM: A switch-level simulator for MOS LSI
25 years of DAC Papers on Twenty-five years of electronic design automation
RELAX: A new circuit simulator for large scale MOS integrated circuits
25 years of DAC Papers on Twenty-five years of electronic design automation
Switch-level delay models for digital MOS VLSI
25 years of DAC Papers on Twenty-five years of electronic design automation
The VLSI design automation assistant: prototype system
25 years of DAC Papers on Twenty-five years of electronic design automation
25 years of DAC Papers on Twenty-five years of electronic design automation
Tokenless static data flow using associative templates
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
On high-speed computing with a programmable linear array
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
A simple approach to specifying concurrent systems
Communications of the ACM
Design and Analysis of Arbitration Protocols
IEEE Transactions on Computers
On Implementing Large Binary Tree Architectures in VLSI and WSI
IEEE Transactions on Computers
The de Bruijn Multiprocessor Network: A Versatile Parallel Processing and Sorting Network for VLSI
IEEE Transactions on Computers
Mesh Computer Algorithms for Computational Geometry
IEEE Transactions on Computers
IEEE Transactions on Computers
An interview with Ivan Sutherland
Communications of the ACM
On Mapping Algorithms to Linear and Fault-Tolerant Systolic Arrays
IEEE Transactions on Computers
A New Approach to Realizing Partially Symmetric Functions
IEEE Transactions on Computers
On the parallel decomposability of geometric problems
SCG '89 Proceedings of the fifth annual symposium on Computational geometry
Multi-stack optimization for data-path chip (microprocessor) layout
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A module generator for optimized CMOS buffers
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
VVDS: a verification/diagnosis system for VHDL
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Optimum design of reliable IC power networks having general graph topologies
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Fast online/offline netlist compilation of hierarchical schematics
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Extreme Area-Time Tradeoffs in VLSI
IEEE Transactions on Computers
A Decomposition Approach for Balancing Large-Scale Acyclic Data Flow Graphs
IEEE Transactions on Computers
Design and Analysis of a Gracefully Degrading Interleaved Memory System
IEEE Transactions on Computers
IEEE Transactions on Computers
Area-Time Optimal Adder Design
IEEE Transactions on Computers
Emulation of Hypercube Architecture on Nearest-Neighbor Mesh-Connected Processing Elements
IEEE Transactions on Computers
Half-Hot State Assignments for Finite State Machines
IEEE Transactions on Computers
Performance Analysis of k-ary n-cube Interconnection Networks
IEEE Transactions on Computers
Design of the IBM RISC System/6000 floating-point execution unit
IBM Journal of Research and Development
A System Design/Scheduling Strategy for Parallel Image Processing
IEEE Transactions on Pattern Analysis and Machine Intelligence
Embedding Rectangular Grids into Square Grids with Dilation Two
IEEE Transactions on Computers
Fault Detection and Design Complexity in C-Testable VLSI Arrays
IEEE Transactions on Computers
Analysis and Design of CMOS Manchester Adders with Variable Carry-Skip
IEEE Transactions on Computers
On Synthesizing Optimal Family of Linear Systolic Arrays for Matrix Multiplication
IEEE Transactions on Computers
Datapath generator based on gate-level symbolic layout
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Clock routing for high-performance ICs
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
High level support for divide-and-conquer parallelism
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
IEEE Transactions on Computers
Flexible transistor matrix (FTM)
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A systolic array architecture for multiplying Toeplitz matrices
SAC '92 Proceedings of the 1992 ACM/SIGAPP symposium on Applied computing: technological challenges of the 1990's
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
Implementing Sequential Machines as Self-Timed Circuits
IEEE Transactions on Computers
Minimizing External Wires in Generalized Single-Row Routing
IEEE Transactions on Computers
Performance of Synchronous and Asynchronous Schemes for VLSI Systems
IEEE Transactions on Computers
IEEE Transactions on Computers
Parallel Architectures and Algorithms for Image Component Labeling
IEEE Transactions on Pattern Analysis and Machine Intelligence
Harmonic scheduling of linear recurrences for digital filter design
EURO-DAC '92 Proceedings of the conference on European design automation
HV/VH trees: a new spatial data structure for fast region queries
DAC '93 Proceedings of the 30th international Design Automation Conference
Resolving signal correlations for estimating maximum currents in CMOS combinational circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
The use of message-based multicomputer components to construct gigabit networks
ACM SIGCOMM Computer Communication Review
Sequencer-based data path synthesis of regular iterative algorithms
DAC '94 Proceedings of the 31st annual Design Automation Conference
Structured design methodology for high-level design
DAC '94 Proceedings of the 31st annual Design Automation Conference
PODC '94 Proceedings of the thirteenth annual ACM symposium on Principles of distributed computing
Extended timing diagrams as a specification language
EURO-DAC '94 Proceedings of the conference on European design automation
Using C to write portable CMOS VLSI module generators
EURO-DAC '94 Proceedings of the conference on European design automation
ACM Transactions on Programming Languages and Systems (TOPLAS)
Verity—a formal verification program for custom CMOS circuits
IBM Journal of Research and Development - Special issue: IBM CMOS technology
Prefix Computations on a Generalized Mesh-Connected Computer with Multiple Buses
IEEE Transactions on Parallel and Distributed Systems
Thoughts on parallelism and concurrency in compiling curricula
ACM Computing Surveys (CSUR)
Power distribution topology design
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Automatic clock abstraction from sequential circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
CAT—caching address tags: a technique for reducing area cost of on-chip caches
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Architectural partitioning of control memory for application specific programmable processors
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Proceedings of the 28th annual international symposium on Microarchitecture
Partition based spatial-merge join
SIGMOD '96 Proceedings of the 1996 ACM SIGMOD international conference on Management of data
IEEE Transactions on Computers
The Unison algorithm: fast evaluation of Boolean expressions
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Time- and Cost-Optimal Algorithm for Interlocking Sets-With Applications
IEEE Transactions on Parallel and Distributed Systems
Microprocessor-Based Computers
Computer
Testing two-phase transition signaling based self-timed circuits in a synthesis environment
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
AMULET1: An Asynchronous ARM Microprocessor
IEEE Transactions on Computers
Clocked and asynchronous instruction pipelines
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
Optimizing two-phase, level-clocked circuitry
Journal of the ACM (JACM)
Journal of VLSI Signal Processing Systems
Timing of Multi-Gigahertz Rapid Single Flux Quantum Digital Circuits
Journal of VLSI Signal Processing Systems - Special issue on high performance clock distribution networks
Retiming gated-clocks and precharged circuit structures
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Fully depleted CMOS/SOI device design guidelines for low power applications
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Minimization of chip size and power consumption of high-speed VLSI buffers
Proceedings of the 1997 international symposium on Physical design
The Reconfigurable Ring of Processors: Fine-Grain Tree-Structured Computations
IEEE Transactions on Computers
Minimizing Area Cost of On-Chip Cache Memories by Caching Address Tags
IEEE Transactions on Computers
An LPGA with foldable PLA-style logic blocks
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
A Unifying Lattice-Based Approach for the Partitioning of Systolic Arrays via LPGS and LSGP
Journal of VLSI Signal Processing Systems
Verification of VHDL designs using VAL
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
PLAYGROUND: minimization of PLAs with mixed ground true outputs
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
The edge-based design rule model revisited
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Kestrel: A Programmable Array for Sequence Analysis
Journal of VLSI Signal Processing Systems - Special issue on application specific systems, architectures and processors
Journal of VLSI Signal Processing Systems
The Design and Implementation of an On-Line Testable UART
Journal of Electronic Testing: Theory and Applications
Mechanical Verification of Adder Circuits using Rewrite RuleLaboratory
Formal Methods in System Design
Analog versus digital: extrapolating from electronics to neurobiology
Neural Computation
VLSI design parsing (preliminary version)
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Verification of systems containing counters
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
A design by example regular structure generator
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Auto-interactive schematics to layout translation
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Decomposition of logic networks into silicon
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A functional language for description and design of digital systems: sequential constructs
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
The VLSI design automation assistant: what's in a knowledge base
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
An algorithm for design rule checking on a multiprocessor
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
An automated data path synthesizer for a canonic structure, implementable in VLSI
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A model of design representation and synthesis
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A case study in process independence
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Effective data management for VLSI design
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Hierarchical circuit verification
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
PHIPLA—a new algorithm for logic minimization
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
PLAYER: a PLA design system for VLSI's
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
The construction of minimal area power and ground nets for VLSI circuits
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
PLA driver selection: an analytic approach
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Transistor level test generation for MOS circuits
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
MOS circuit models in Network C
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Reasoning about digital systems using temporal logic
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Design-for-testability of PLA's using statistical cooling
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Vanguard: a chip physical design system
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A design rule database system to support technology-adaptable applications
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Optimal order of the VLSI IC testing sequence
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Comparison of CMOS PLA and polycell representations of control logic
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
MADMACS: a new VLSI layout macro editor
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Principles of the SYCO compiler
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Alpha du centaur: a prototype environment for the design of parallel regular alorithms
ICS '89 Proceedings of the 3rd international conference on Supercomputing
Intelligent support for the engineering of software (panel paper)
ICSE '85 Proceedings of the 8th international conference on Software engineering
Using semantic knowledge for transaction processing in a distributed database
ACM Transactions on Database Systems (TODS)
The design of a hardware recognizer for utilization in scanning operations
CSC '85 Proceedings of the 1985 ACM thirteenth annual conference on Computer Science
Representation in CAD: Models and semantics
CSC '85 Proceedings of the 1985 ACM thirteenth annual conference on Computer Science
The Area-Time Complexity of Binary Multiplication
Journal of the ACM (JACM)
The Compilation of Regular Expressions into Integrated Circuits
Journal of the ACM (JACM)
Three-Dimensional VLSI: a case study
Journal of the ACM (JACM)
Information Transfer in Distributed Computing with Applications to VLSI
Journal of the ACM (JACM)
Graph Problems on a Mesh-Connected Processor Array
Journal of the ACM (JACM)
Vector Transfer by Self-Tested Self-Synchronization for Parallel Systems
IEEE Transactions on Parallel and Distributed Systems
A rule based system for the optimal state assignment of controllers
ACM '86 Proceedings of 1986 ACM Fall joint computer conference
A 32-bit CMOS microprocessor with six-stage pipeline structure
ACM '86 Proceedings of 1986 ACM Fall joint computer conference
CSC '86 Proceedings of the 1986 ACM fourteenth annual conference on Computer science
Array processor with multiple broadcasting
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
TIDBITS: speedup via time-delay bit-slicing in ALU design for VLSI technology
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
High-speed top-of-stack scheme for VLSI processor: a management algorithm and its analysis
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
A systolic multiplier unit and its VLSI design
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Buffer Assignment Algorithms on Data Driven ASICs
IEEE Transactions on Computers
Tighter Layouts of the Cube-Connected Cycles
IEEE Transactions on Parallel and Distributed Systems
Extracting Behavioral Data from Physical Descriptions of MEMS for Simulation
Journal of VLSI Signal Processing Systems - Mixed-signal design issues
Extracting Behavioral Data from Physical Descriptions of MEMS for Simulation
Analog Integrated Circuits and Signal Processing - Special issue on mixed-signal design issues
Delay-Insensitivity and Semi-Modularity
Formal Methods in System Design
Using Ada as a language for a CAD tool development: lessons and experiences
WADAS '88 Proceedings of the fifth Washington Ada symposium on Ada
LEOPARD: a Logical Effort-based fanout OPtimizer for ARea and Delay
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
ACM Computing Surveys (CSUR)
From Electron Mobility to Logical Structure: A View of Integrated Circuits
ACM Computing Surveys (CSUR)
Testing and Debugging Custom Integrated Circuits
ACM Computing Surveys (CSUR)
Data-Driven and Demand-Driven Computer Architecture
ACM Computing Surveys (CSUR)
ACM Transactions on Programming Languages and Systems (TOPLAS)
Using electronic mail as a teaching tool
Communications of the ACM
The cube-connected cycles: a versatile network for parallel computation
Communications of the ACM
HISDL—a structure description language
Communications of the ACM
Design of a LISP-based microprocessor
Communications of the ACM
Practical low-cost CPL implementations threshold logic functions
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
KARL subset used as a hardware design algebra
ACM SIGDA Newsletter
Slice and dice: a simple, improved approximate tiling recipe
SODA '02 Proceedings of the thirteenth annual ACM-SIAM symposium on Discrete algorithms
Programming aspects of VLSI: (preliminary version)
POPL '82 Proceedings of the 9th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Distributed simulation of asynchronous hardware: the program driven synchronization protocol
Journal of Parallel and Distributed Computing
Transistor sizing of energy-delay--efficient circuits
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
Built-In Self-Test of a CMOS ALU
IEEE Design & Test
The Counterflow Pipeline Processor Architecture
IEEE Design & Test
Developing Micropipeline Wavefront Arbiters
IEEE Design & Test
Trends in Semiconductor Memories
IEEE Micro
A Pipeline Design of a Fast Prime Factor DFT on a Finite Field
IEEE Transactions on Computers
A Single Chip Parallel Multiplier by MOS Technology
IEEE Transactions on Computers
The Generation of a Class of Multipliers: Synthesizing Highly Parallel Algorithms in VLSI
IEEE Transactions on Computers
A Reduced-Area Scheme for Carry-Select Adders
IEEE Transactions on Computers
IEEE Transactions on Computers
IEEE Transactions on Computers
Salphasic Distribution of Clock Signals for Synchronous Systems
IEEE Transactions on Computers
Hazards, Critical Races, and Metastability
IEEE Transactions on Computers
A Parallel Execution Model of Logic Programs
IEEE Transactions on Parallel and Distributed Systems
A Processor-Time-Minimal Systolic Array for Cubical Mesh Algorithms
IEEE Transactions on Parallel and Distributed Systems
HARP: An Open Architecture for Parallel Matrix and Signal Processing
IEEE Transactions on Parallel and Distributed Systems
Time-Optimal Visibility-Related Algorithms on Meshes with Multiple Broadcasting
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Software Engineering
Topics in the theory of DNA computing
Theoretical Computer Science - Natural computing
Integration, the VLSI Journal
Fast median-finding on mesh-connected computers with segmented buses
Nordic Journal of Computing
The complexity of approximating pspace-complete problems for hierarchical specifications
Nordic Journal of Computing
Formal engineering design synthesis
Formal engineering design synthesis
Well-separated pair decomposition for the unit-disk graph metric and its applications
Proceedings of the thirty-fifth annual ACM symposium on Theory of computing
ET2: a metric for time and energy efficiency of computation
Power aware computing
Processor Elements for the Standard Cell Implementation of Residue Number Systems
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
ECSTAC: a fast asynchronous microprocessor
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
New CMOS VLSI linear self-timed architectures
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Low-latency asynchronous FIFO buffers
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Control Resynthesis for Control-Dominated Asynchronous Designs
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Energy recovery for low-power CMOS
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Dynamic CMOS circuit techniques for delay and power reduction in parallel adders
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Kestrel: Design of an 8-bit SIMD Parallel Processor
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
Self-checking architectures for fast Hartley transform
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Power Optimization of Delay Constrained CMOS Bus Drivers
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Design and selection of buffers for minimum power-delay product
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Applicative programming and digital design
POPL '84 Proceedings of the 11th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Graph-optimization techniques for IC layout and compaction
DAC '83 Proceedings of the 20th Design Automation Conference
Simulating pass transistor circuits using logic simulation machines
DAC '83 Proceedings of the 20th Design Automation Conference
Formal verification of a real-time hardware design
DAC '83 Proceedings of the 20th Design Automation Conference
A logic design front-end for improved engineering productivity
DAC '83 Proceedings of the 20th Design Automation Conference
Pictures with parentheses: Combining graphics and procedures in a VLSI layout tool
DAC '83 Proceedings of the 20th Design Automation Conference
An improved switch-level simulator for MOS circuits
DAC '83 Proceedings of the 20th Design Automation Conference
The VLSI Design Automation Assistant: Prototype system
DAC '83 Proceedings of the 20th Design Automation Conference
DAC '83 Proceedings of the 20th Design Automation Conference
PRONTO: Quick PLA product reduction
DAC '83 Proceedings of the 20th Design Automation Conference
Binary Decision Diagrams: From abstract representations to physical implementations
DAC '83 Proceedings of the 20th Design Automation Conference
Tutorial: The relational data model for Design Automation
DAC '83 Proceedings of the 20th Design Automation Conference
Edisim and Edicap: Graphical simulator interfaces
DAC '83 Proceedings of the 20th Design Automation Conference
Total stuct-at-fault testing by circuit transformation
DAC '83 Proceedings of the 20th Design Automation Conference
DAC '83 Proceedings of the 20th Design Automation Conference
Space efficient algorithms for VLSI artwork analysis
DAC '83 Proceedings of the 20th Design Automation Conference
Experiments with the SLIM Circuit Compactor
DAC '83 Proceedings of the 20th Design Automation Conference
CAF: A computer-assisted floorplanning tool
DAC '83 Proceedings of the 20th Design Automation Conference
HOPLA-PLA optimization and synthesis
DAC '83 Proceedings of the 20th Design Automation Conference
A symbolic-interconnect router for custom IC design
DAC '84 Proceedings of the 21st Design Automation Conference
The icewater language and interpreter
DAC '84 Proceedings of the 21st Design Automation Conference
Cell compilation with constraints
DAC '84 Proceedings of the 21st Design Automation Conference
DAC '84 Proceedings of the 21st Design Automation Conference
A model for hardware description and verification
DAC '84 Proceedings of the 21st Design Automation Conference
DAC '84 Proceedings of the 21st Design Automation Conference
Delay and power optimization in VLSI circuits
DAC '84 Proceedings of the 21st Design Automation Conference
Switch-level delay models for digital MOS VLSI
DAC '84 Proceedings of the 21st Design Automation Conference
DAC '84 Proceedings of the 21st Design Automation Conference
An interactive electrical graph extractor
DAC '84 Proceedings of the 21st Design Automation Conference
An electronic design interchange format
DAC '84 Proceedings of the 21st Design Automation Conference
DAC '84 Proceedings of the 21st Design Automation Conference
A contour display generation algorithm for VLSI implementation
SIGGRAPH '82 Proceedings of the 9th annual conference on Computer graphics and interactive techniques
Architecture of the PSC-a programmable systolic chip
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
The Boolean Vector Machine [BVM]
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A VLSI tree machine for relational data bases
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
Hierarchical function distribution - a design principle for advanced multicomputer architectures
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
The new generation of computer architecture
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
VLSI architectures for high speed recognition of context-free languages and finite-state languages
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Asynchronous and clocked control structures for VLSI based interconnection networks
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Towards a family of languages for the design and implementation of machine architectures
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Fault-tolerant wafer-scale architectures for VLSI
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
A recursive computer architecture for VLSI
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Throughput analysis and configuration design of a shared-resource multiprocessor system: PUMPS
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
MANIP-a parallel computer system for implementing branch and bound algorithms
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
A reconfigurable and fault-tolerant VLSI multiprocessor array
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Design of special-purpose VLSI chips: Example and opinions
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
muFP, a language for VLSI design
LFP '84 Proceedings of the 1984 ACM Symposium on LISP and functional programming
Data sharing in an FFP machine
LFP '82 Proceedings of the 1982 ACM symposium on LISP and functional programming
A layout strategy for VLSI which is provably good (Extended Abstract)
STOC '82 Proceedings of the fourteenth annual ACM symposium on Theory of computing
Measuring energy consumption in VLSI circuits: A foundation
STOC '82 Proceedings of the fourteenth annual ACM symposium on Theory of computing
Graph problems on a mesh-connected processor array (Preliminary Version)
STOC '82 Proceedings of the fourteenth annual ACM symposium on Theory of computing
Recent developments in representation in the science of design
DAC '81 Proceedings of the 18th Design Automation Conference
DAC '81 Proceedings of the 18th Design Automation Conference
Overview of an Arithmetic Design System
DAC '81 Proceedings of the 18th Design Automation Conference
DAC '81 Proceedings of the 18th Design Automation Conference
Current issues in government interest and involvement in CAD
DAC '81 Proceedings of the 18th Design Automation Conference
A computer-aided-design system for segmented-folded PLA macro-cells
DAC '81 Proceedings of the 18th Design Automation Conference
DAC '81 Proceedings of the 18th Design Automation Conference
The analog behavior of digital integrated circuits
DAC '81 Proceedings of the 18th Design Automation Conference
Contrasts in physical design between LSI and VLSI
DAC '81 Proceedings of the 18th Design Automation Conference
Custom VLSI electrical rule checking in an intelligent terminal
DAC '81 Proceedings of the 18th Design Automation Conference
A MOS modelling technique for 4-state true-value hierarchical logic simulation or Karnough knowledge
DAC '81 Proceedings of the 18th Design Automation Conference
MOSSIM: A switch-level simulator for MOS LSI
DAC '81 Proceedings of the 18th Design Automation Conference
CELTIC - solving the problems of LSI design with an integrated polycell DA system
DAC '81 Proceedings of the 18th Design Automation Conference
A parallel bit map processor architecture for DA algorithms
DAC '81 Proceedings of the 18th Design Automation Conference
Area-time efficient addition in charge based technology
DAC '81 Proceedings of the 18th Design Automation Conference
Adaptation and personalization of VLSI-based computer architecture
MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
Bounds on minimax edge length for complete binary trees
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
The entropic limitations on VLSI computations(Extended Abstract)
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
Optimal wiring between rectangles
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
A model of computation for VLSI with related complexity results
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
The economics of programmable system components
MICRO 13 Proceedings of the 13th annual workshop on Microprogramming
Design considerations for the VLSI processor of X-TREE
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
ICARUS: An interactive integrated circuit layout program
DAC '78 Proceedings of the 15th Design Automation Conference
The evolution of design automation to meet the challanges of VLSI
DAC '80 Proceedings of the 17th Design Automation Conference
Design integrity and immunity checking: A new look at layout verification and design rule checking
DAC '80 Proceedings of the 17th Design Automation Conference
An optimal solution to a wire-routing problem (preliminary version)
STOC '80 Proceedings of the twelfth annual ACM symposium on Theory of computing
Optimal tree layout (Preliminary Version)
STOC '80 Proceedings of the twelfth annual ACM symposium on Theory of computing
The chip complexity of binary arithmetic
STOC '80 Proceedings of the twelfth annual ACM symposium on Theory of computing
AIDS, APL integrated-circuit design system
APL '81 Proceedings of the international conference on APL
Use of VLSI in algebraic computation: Some suggestions
SYMSAC '81 Proceedings of the fourth ACM symposium on Symbolic and algebraic computation
Folding and unrolling systolic arrays (Preliminary Version)
PODC '82 Proceedings of the first ACM SIGACT-SIGOPS symposium on Principles of distributed computing
A systolic (VLSI) array using RNS for digital signal processing applications
CSC '84 Proceedings of the ACM 12th annual computer science conference on SIGCSE symposium
Dictionary machines with a small number of processors
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
VLSI based design principles for MIMD multiprocessor computers with distributed memory management
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
A multiprocessor network suitable for single-chip VLSI implementation
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
STOC '84 Proceedings of the sixteenth annual ACM symposium on Theory of computing
Borel sets and circuit complexity
STOC '83 Proceedings of the fifteenth annual ACM symposium on Theory of computing
An approximation algorithm for manhattan routing
STOC '83 Proceedings of the fifteenth annual ACM symposium on Theory of computing
Techniques for programmable logic array folding
DAC '82 Proceedings of the 19th Design Automation Conference
A logic minimizer for VLSI PLA design
DAC '82 Proceedings of the 19th Design Automation Conference
A hardware assisted design rule check architecture
DAC '82 Proceedings of the 19th Design Automation Conference
The planar package planner for system designers
DAC '82 Proceedings of the 19th Design Automation Conference
A database approach for managing VLSI design data
DAC '82 Proceedings of the 19th Design Automation Conference
PAOLA: A tool for topological optimization of large PLAS
DAC '82 Proceedings of the 19th Design Automation Conference
Towards VLSI complexity: The DA algorithm scaling problem: can special DA hardware help?
DAC '82 Proceedings of the 19th Design Automation Conference
The quad-CIF tree: A data structure for hierarchical on-line algorithms
DAC '82 Proceedings of the 19th Design Automation Conference
SAGA: An Experimental Silicon Assembler
DAC '82 Proceedings of the 19th Design Automation Conference
A fault simulation methodology for VLSI
DAC '82 Proceedings of the 19th Design Automation Conference
ALI: A procedural language to describe VLSI layouts
DAC '82 Proceedings of the 19th Design Automation Conference
The “PI” (placement and interconnect) system
DAC '82 Proceedings of the 19th Design Automation Conference
Lyra: A new approach to geometric layout rule checking
DAC '82 Proceedings of the 19th Design Automation Conference
Cellular image processing techniques for VLSI circuit layout validation and routing
DAC '82 Proceedings of the 19th Design Automation Conference
Relax: A new circuit for large scale MOS integrated circuits
DAC '82 Proceedings of the 19th Design Automation Conference
Logical correctness by construction
DAC '82 Proceedings of the 19th Design Automation Conference
On routing for custom integrated circuits
DAC '82 Proceedings of the 19th Design Automation Conference
DAC '82 Proceedings of the 19th Design Automation Conference
Parallel processing, special-purpose hardware, and DA applications
CSC-83 Proceedings of the 1983 computer science conference
VLSI tools and architectures: Putting the new technology to work
CSC-83 Proceedings of the 1983 computer science conference
Introduction to silicon compilation
DAC '79 Proceedings of the 16th Design Automation Conference
Bristle Blocks: A silicon compiler
DAC '79 Proceedings of the 16th Design Automation Conference
Formal Verification of Digital Systems
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Asynchronous Design - An Interesting Alternative
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
A Design of Analog C-Matrix Circuits used for Signal/Data Processing
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Mutual Testing based on Wavelet Transforms
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
An Adaptive Supply-Voltage Scheme for Low Power Self-Timed CMOS Digital Design
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Methodology for designing a computer architecture
ACM SIGARCH Computer Architecture News
Correctness proofs of parameterized hardware modules in the CATHEDRAL-II synthesis environment
EURO-DAC '90 Proceedings of the conference on European design automation
Restructuring VLSI layout representations for efficiency
EURO-DAC '91 Proceedings of the conference on European design automation
Analysis of blocking dynamic circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Arbitration-free synchronization
Distributed Computing - Papers in celebration of the 20th anniversary of PODC
Design of superbuffers in sub-100nm CMOS technologies with significant gate leakage
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Mapping rectangular mesh algorithms onto asymptotically space-optimal arrays
Journal of Parallel and Distributed Computing
On teaching theoretical foundations of Computer Science
ACM SIGACT News
Using a hardware simulation engine for custom MOS structured designs
IBM Journal of Research and Development
Tradeoffs between stretch factor and load balancing ratio in routing on growth restricted graphs
Proceedings of the twenty-third annual ACM symposium on Principles of distributed computing
ACM Transactions on Embedded Computing Systems (TECS)
Automatic process migration of datapath hard IP libraries
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
A switch architecture and signal synchronization for GALS system-on-chips
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Body-bias compensation technique for SubThreshold CMOS static logic gates
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Derivation of a logarithmic time carry lookahead addition circuit
Journal of Functional Programming
Difficulties in realizing large-scale educational computing projects
ACM SIGCUE Outlook
Introduction to reversible computing: motivation, progress, and challenges
Proceedings of the 2nd conference on Computing frontiers
Logic-based eDRAM: origins and rationale for use
IBM Journal of Research and Development - Electrochemical technology in microelectronics
A formal approach to designing delay-insensitive circuits
Distributed Computing
Partitioning and placement for buildable QCA circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Encyclopedia of Computer Science
Nanowire-based programmable architectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Modeling unbuffered latches for timing analysis
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Backend CAD flows for "restrictive design rules"
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
A methodology to implement real-time applications onto reconfigurable circuits
The Journal of Supercomputing
Origins and motivations for design rules in QCA
Nano, quantum and molecular computing
Partitioning and placement for buildable QCA circuits
Nano, quantum and molecular computing
The design of an asynchronous microprocessor
ACM SIGARCH Computer Architecture News
SLIM: a simulation and implementation language for VLSI microcode
ACM SIGMICRO Newsletter
Computing synchronizer failure probabilities
Proceedings of the conference on Design, automation and test in Europe
Computer architecture education at the University of Illinois: current status and some thoughts
WCAE-2 '96 Proceedings of the 1996 workshop on Computer architecture education
Teaching students computer architecture for new, nanotechnologies
WCAE '02 Proceedings of the 2002 workshop on Computer architecture education: Held in conjunction with the 29th International Symposium on Computer Architecture
Proceedings of the 44th annual Design Automation Conference
A VLSI-Based I/O Formatting Device
IEEE Transactions on Computers
A Switch-Level Model and Simulator for MOS Digital Systems
IEEE Transactions on Computers
Design Considerations for Single-Chip Computers of the Future
IEEE Transactions on Computers
A Mesh-Connected Area-Time Optimal VLSI Multiplier of Large Integers
IEEE Transactions on Computers
Hardware Specification with Temporal Logic: An Example
IEEE Transactions on Computers
A Regular Layout for Parallel Adders
IEEE Transactions on Computers
Asynchronous and Clocked Control Structures for VSLI Based Interconnection Networks
IEEE Transactions on Computers
A Combinatorial Limit to the Computing Power of VLSI Circuits
IEEE Transactions on Computers
The Binary Tree as an Interconnection Network: Applications to Multiprocessor Systems and VLSI
IEEE Transactions on Computers
VLSI Performance Comparison of Banyan and Crossbar Communications Networks
IEEE Transactions on Computers
A Fully Parallel Mixed-Radix Conversion Algorithm for Residue Number Applications
IEEE Transactions on Computers
The Design of Easily Testable VLSI Array Multipliers
IEEE Transactions on Computers
Design and Application of Self-Testing Comparators Implemented with MOS PLA's
IEEE Transactions on Computers
Good Layouts for Pattern Recognizers
IEEE Transactions on Computers
Area-Time Optimal Fast Implementation of Several Functions in a VLSI Model
IEEE Transactions on Computers
IEEE Transactions on Computers
An Optimal Worst Case Algorithm for Reporting Intersections of Rectangles
IEEE Transactions on Computers
Totally Self-Checking Checker for 1-out-of-n Code Using Two-Rail Codes
IEEE Transactions on Computers
Area Time Optimal VLSI Circuits for Convolution
IEEE Transactions on Computers
Computational Geometry on a Systolic Chip
IEEE Transactions on Computers
Two VLSI Structures for the Discrete Fourier Transform
IEEE Transactions on Computers
A Functional Approach to Testing Bit-Sliced Microprocessors
IEEE Transactions on Computers
Stored State Asynchronous Sequential Circuits
IEEE Transactions on Computers
An Algebraic Model of Fault-Masking Logic Circuits
IEEE Transactions on Computers
A Parallel Architecture for Digital Filtering Using Fermat Number Transforms
IEEE Transactions on Computers
A Canonical Bit-Sequential Multiplier
IEEE Transactions on Computers - Lecture notes in computer science Vol. 174
A Dictionary Machine (for VLSI)
IEEE Transactions on Computers
On Embedding Rectangular Grids in Square Grids
IEEE Transactions on Computers
Comments on "Fault Diagnosis of MOS Combinational Networks"
IEEE Transactions on Computers
The VLSI Implementation of a Reed Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm
IEEE Transactions on Computers
A Robust Matrix-Multiplication Array
IEEE Transactions on Computers
The Diogenes Approach to Testable Fault-Tolerant Arrays of Processors
IEEE Transactions on Computers
IEEE Transactions on Computers
Comparing Serial Computers, Arrays, and Networks Using Measures of "Active Resources"
IEEE Transactions on Computers
Design of Easily Testable Bit-Sliced Systems
IEEE Transactions on Computers
Wavefront Array Processor: Language, Architecture, and Applications
IEEE Transactions on Computers
Pin Limitations and Partitioning of VLSI Interconnection Networks
IEEE Transactions on Computers
An Easily Testable Design of Programmable Logic Arrays for Multiple Faults
IEEE Transactions on Computers
IEEE Transactions on Computers
A Variable-Length Shift-Register
IEEE Transactions on Computers
The Parallel Enumeration Sorting Scheme for VLSI
IEEE Transactions on Computers
Partitioned Matrix Algorithms for VLSI Arithmetic Systems
IEEE Transactions on Computers
A Graph Model for Pattern-Sensitive Faults in Random Access Memories
IEEE Transactions on Computers
VLSI Array Design Under Constraint of Limited I/O Bandwidth
IEEE Transactions on Computers
The VLSI Complexity of Sorting
IEEE Transactions on Computers
A Novel EDA Tool for VLSI Test Vectors Management
Journal of Electronic Testing: Theory and Applications
High performance dense linear algebra on a spatially distributed processor
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
NCML: a data exchange format for internet-based machining
International Journal of Computer Applications in Technology
Partitioning parameterized 45-degree polygons with constraint programming
ACM Transactions on Design Automation of Electronic Systems (TODAES)
The design of high-performance dynamic asynchronous pipelines: high-capacity style
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hierarchical memory with block transfer
SFCS '87 Proceedings of the 28th Annual Symposium on Foundations of Computer Science
An algorithm for the difference between set covers
Discrete Applied Mathematics
Designing combinational circuits with list homomorphisms
Journal of Computational Methods in Sciences and Engineering - Selected papers from the International Conference on Computer Science,Software Engineering, Information Technology, e-Business, and Applications, 2003
25 Years of Model Checking
ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
From Bit Level Systolic Arrays to HDTV Processor Chips
Journal of Signal Processing Systems
Finding the Next Computational Model: Experience with the UCSC Kestrel
Journal of Signal Processing Systems
Application-specific Processor Architecture: Then and Now
Journal of Signal Processing Systems
Incremental analysis of large VLSI Layouts
Integration, the VLSI Journal
Reduced-instruction set multi-microcomputer system
AFIPS '84 Proceedings of the July 9-12, 1984, national computer conference and exposition
Software sympathetic chip set design
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
A computer-aided VLSI layout system
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
New directions for micro- and system architectures in the 1980s
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Microprogramming: the challenges of VLSI
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Vertical and outboard migration: a progress report
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Importance sampled circuit learning ensembles for robust analog IC design
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Constraint posting for verifying VLSI circuits
IJCAI'89 Proceedings of the 11th international joint conference on Artificial intelligence - Volume 2
IBM Journal of Research and Development
Algorithms for permutation channel routing
Integration, the VLSI Journal
Integration workshop: Expandable arithmetic block macrocell
Integration, the VLSI Journal
Integration, the VLSI Journal
Partitioning and floor-planning for data-path chip (microprocessor) layout
Integration, the VLSI Journal
Circal: A calculus for circuit description
Integration, the VLSI Journal
VLSI systolic arrays for band matrix multiplication
Integration, the VLSI Journal
An autolayout system for a hierarchical i.c. design environment
Integration, the VLSI Journal
A proof rule for restoring logic circuits
Integration, the VLSI Journal
Transistor sizing for large combinational digital CMOS circuits
Integration, the VLSI Journal
A systolic VLSI matrix for a family of fundamental searching problems
Integration, the VLSI Journal
An architecture for a VLSI FFT processor
Integration, the VLSI Journal
An area-time efficient NMOS adder
Integration, the VLSI Journal
VLSI architecture for device simulation
Integration, the VLSI Journal
On minimizing memory in systolic arrays for the dynamic time warping algorithm
Integration, the VLSI Journal
Interactive verification of concurrent systems using symbolic execution
AI Communications - Practical Aspects of Automated Reasoning
Paper: Hybrid systolic sorters
Parallel Computing
Visual processing platform based on artificial retinas
IWANN'07 Proceedings of the 9th international work conference on Artificial neural networks
General strategies to design nanometer flip-flops in the energy-delay space
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Robotics and Computer-Integrated Manufacturing
Simplified 2-D cubic spline interpolation scheme using direct computation algorithm
IEEE Transactions on Image Processing
RTRAM: reconfigurable and testable multi-bit RAM design
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
Concurrent off-phase built-in self-test of dormant logic
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
Embedding Tree Structures in VLSI Hexagonal Arrays
IEEE Transactions on Computers
Fast Burst Error-Correction Scheme with Fire Code
IEEE Transactions on Computers
VLSI Sorting with Reduced Hardware
IEEE Transactions on Computers
Finding Rectangle Intersections by Divide-and-Conquer
IEEE Transactions on Computers
Cascading Transmission Gates to Enhance Multiplier Performance
IEEE Transactions on Computers
A Testable PLA Design with Low Overhead and High Fault Coverage
IEEE Transactions on Computers
A New PLA Design for Universal Testability
IEEE Transactions on Computers
Signature Testing of Sequential Machines
IEEE Transactions on Computers
Theory and application of width bounded geometric separators
Journal of Computer and System Sciences
Test generation for MOS circuits
ITC'84 Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production
Lower overhead design for testability of programmable logic arrays
ITC'84 Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production
GALDS: a complete framework for designing multiclock ASICs and socs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Pipelining communications in large VLSI/ULSI systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IWDC'04 Proceedings of the 6th international conference on Distributed Computing
Computational biology – the new frontier of computer science
IWDC'04 Proceedings of the 6th international conference on Distributed Computing
Algorithms for range-aggregate query problems involving geometric aggregation operations
ISAAC'05 Proceedings of the 16th international conference on Algorithms and Computation
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Approximate distance queries in disk graphs
WAOA'06 Proceedings of the 4th international conference on Approximation and Online Algorithms
IBM-ACS: reminiscences and lessons learned from a 1960's supercomputer project
Dependable and Historic Computing
Implementation of a fast programmable edge detection preprocessor
Pattern Recognition Letters
Proceedings of the 2012 Symposium on Theory of Modeling and Simulation - DEVS Integrative M&S Symposium
An O(log N) parallel time exact hidden-line algorithm
EGGH'87 Proceedings of the Second Eurographics conference on Advances in Computer Graphics Hardware
Content-addressable memories for quadtree-based images
EGGH'88 Proceedings of the Third Eurographics conference on Advances in Computer Graphics Hardware
An optimal algorithm for computing the non-trivial circuits of a union of iso-oriented rectangles
Information Processing Letters
Computers and Electrical Engineering
Synchronous digital circuits as functional programs
ACM Computing Surveys (CSUR)
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