Area Time Optimal VLSI Circuits for Convolution

Authors:
G. M. Baudet;F. P. Preparata;J. E. Vuillemin
Affiliations:
Department of Computer Science, Brown University;-;-
Venue:
IEEE Transactions on Computers
Year:
1983

Citing 4
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Abstract

A family of VLSI circuits is presented to perform open convolution, i.e., polynomial multiplication. The circuits are all based on a recursive construction and are therefore particularly well adapted to automated design. All the circuits presented are optimal with respect to the area-time2 tradeoff, and, depending on the degree of paralleism or pipeline, they range from a compact but slow convolver to a large but very fast convolver.