Three-Dimensional VLSI: a case study
Journal of the ACM (JACM)
From Electron Mobility to Logical Structure: A View of Integrated Circuits
ACM Computing Surveys (CSUR)
The cube-connected cycles: a versatile network for parallel computation
Communications of the ACM
Introduction to VLSI Systems
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
STOC '79 Proceedings of the eleventh annual ACM symposium on Theory of computing
The chip complexity of binary arithmetic
STOC '80 Proceedings of the twelfth annual ACM symposium on Theory of computing
A complexity theory for VLSI
Optimal Matrix Multiplication on Fault-Tolerant VLSI Arrays
IEEE Transactions on Computers
The communication complexity of several problems in matrix computation
SPAA '89 Proceedings of the first annual ACM symposium on Parallel algorithms and architectures
Analog Integrated Circuits and Signal Processing - Special issue on analog nano-electronics
Optimal organizations for pipelined hierarchical memories
Proceedings of the fourteenth annual ACM symposium on Parallel algorithms and architectures
Cellular automata: energy consumption and physical feasibility
Fundamenta Informaticae - Special issue on cellular automata
An Address Dependence Model of Computation for Hierarchical Memories with Pipelined Transfer
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 8 - Volume 09
On approximating the ideal random access machine by physical machines
Journal of the ACM (JACM)
Cellular Automata: Energy Consumption and Physical Feasibility
Fundamenta Informaticae - Cellular Automata
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A new model of computation for VLSI, based on the assumption that time for propagating information is at least linear in the distance, is proposed. While accommodating for basic laws of physics, the model is designed to be general and technology independent. Thus, from a complexity viewpoint, it is especially suited for deriving lower bounds and trade-offs. New results for a number of problems, including fan-in, transitive functions, matrix multiplication, and sorting are presented. As regards upper bounds, it must be noted that, because of communication costs, the model clearly favors regular and pipelined architectures (e.g., systolic arrays).