Kestrel: A Programmable Array for Sequence Analysis

Authors:
Jeffrey D. Hirschberg;David M. Dahle;Kevin Karplus;Don Speck;Richard Hughey
Affiliations:
Department of Computer Engineering, Baskin School of Engineering, University of California, Santa Cruz, CA 95064;Department of Computer Engineering, Baskin School of Engineering, University of California, Santa Cruz, CA 95064;Department of Computer Engineering, Baskin School of Engineering, University of California, Santa Cruz, CA 95064;Department of Computer Engineering, Baskin School of Engineering, University of California, Santa Cruz, CA 95064;Department of Computer Engineering, Baskin School of Engineering, University of California, Santa Cruz, CA 95064
Venue:
Journal of VLSI Signal Processing Systems - Special issue on application specific systems, architectures and processors
Year:
1998

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Abstract

Kestrel is a programmable linear array processordesigned for sequence analysis. Among other features, Kestrelincludes an 8-bit word, a single-cycle add-and-minimizeinstruction, a multiplier and efficient communication usingshared registers. This paper describes Kestrel‘s functionalunits in detail, and examines each of their effects on systemperformance. With functional prototype chips completed, we willassemble a full single-board Kestrel array, with 512 processingelements on eight chips, in early 1998.