Bounds to Complexities of Networks for Sorting and for Switching
Journal of the ACM (JACM)
The Area-Time Complexity of Binary Multiplication
Journal of the ACM (JACM)
Sorting on a mesh-connected parallel computer
Communications of the ACM
Introduction to VLSI Systems
Hardware sorter and its application to data base machine
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
New layouts for the shuffle-exchange graph(Extended Abstract)
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
I/O complexity: The red-blue pebble game
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
Some complexity questions related to distributive computing(Preliminary Report)
STOC '79 Proceedings of the eleventh annual ACM symposium on Theory of computing
STOC '83 Proceedings of the fifteenth annual ACM symposium on Theory of computing
A logarithmic time sort for linear size networks
STOC '83 Proceedings of the fifteenth annual ACM symposium on Theory of computing
LAYOUT FOR THE SHUFFLE-EXCHANGE GRAPH AND LOWER BOUND TECHNIQUES FOR VLSI
LAYOUT FOR THE SHUFFLE-EXCHANGE GRAPH AND LOWER BOUND TECHNIQUES FOR VLSI
A complexity theory for VLSI
Area-efficient vlsi computation
Area-efficient vlsi computation
Big Omicron and big Omega and big Theta
ACM SIGACT News
Bitonic Sort on a Mesh-Connected Parallel Computer
IEEE Transactions on Computers
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers
IEEE Transactions on Computers
A Combinatorial Limit to the Computing Power of VLSI Circuits
IEEE Transactions on Computers
Very Fast Fourier Transform Algorithms Hardware for Implementation
IEEE Transactions on Computers
On the Complexity of Sorting in Magnetic Bubble Memory Systems
IEEE Transactions on Computers
Fully Interconnecting Multiple Computers with Pipelined Sorting Nets
IEEE Transactions on Computers
IEEE Transactions on Computers
The cube-connected-cycles: A versatile network for parallel computation
SFCS '79 Proceedings of the 20th Annual Symposium on Foundations of Computer Science
New lower bound techniques for VLSI
SFCS '81 Proceedings of the 22nd Annual Symposium on Foundations of Computer Science
Parallel sorting machines: their speed and efficiency
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Algorithm and hardware for a merge sort using multiple processors
IBM Journal of Research and Development
IEEE Transactions on Computers
VLSI Architectures for multidimensional fourier transform processing
IEEE Transactions on Computers
The Ultrascalar Processor-An Asymptotically Scalable Superscalar Microarchitecture
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Architecture of a FPGA-based coprocessor: the PAR-1
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
The average complexity of deterministic and randomized parallel comparison sorting algorithms
SFCS '87 Proceedings of the 28th Annual Symposium on Foundations of Computer Science
Improving the average delay of sorting
Theoretical Computer Science
Paper: Hybrid systolic sorters
Parallel Computing
Improving the average delay of sorting
TAMC'07 Proceedings of the 4th international conference on Theory and applications of models of computation
VLSI Sorting with Reduced Hardware
IEEE Transactions on Computers
A 32GBit/s communication SoC for a waferscale neuromorphic system
Integration, the VLSI Journal
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The area-time complexity of sorting is analyzed under an updated model of VLSI computation. The new model makes a distinction between "processing" circuits and "memory" circuits; the latter are less important since they are denser and consume less power. Other adjustments to the model make it possible to compare pipelined and nonpipelined designs.