A taxonomy of parallel sorting
ACM Computing Surveys (CSUR)
A Fault-Tolerant Modular Architecture for Binary Trees
IEEE Transactions on Computers - The MIT Press scientific computation series
An Array Layout Methodology for VLSI Circuits
IEEE Transactions on Computers
Design of a Multiple-Valued Systolic System for the Computation of the Chrestenson Spectrum
IEEE Transactions on Computers
Broadcast Normalization in Systolic Design
IEEE Transactions on Computers
Systematic hardware adaptation of systolic algorithms
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
A high performance reconfigurable parallel processing architecture
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
Extreme Area-Time Tradeoffs in VLSI
IEEE Transactions on Computers
Optimal VLSI Dictionary Machines Without Compress Instructions
IEEE Transactions on Computers
Efficient VLSI Layouts for Homogeneous Product Networks
IEEE Transactions on Computers
Parallel discrete event simulation: a case study
ANSS '85 Proceedings of the 18th annual symposium on Simulation
Compiling path expressions into VLSI circuits
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Three-Dimensional VLSI: a case study
Journal of the ACM (JACM)
Optimal organizations for pipelined hierarchical memories
Proceedings of the fourteenth annual ACM symposium on Parallel algorithms and architectures
Massive parallel processing for matrix multiplication: a systolic approach
Highly parallel computaions
How to assemble tree machines (Extended Abstract)
STOC '82 Proceedings of the fourteenth annual ACM symposium on Theory of computing
A layout strategy for VLSI which is provably good (Extended Abstract)
STOC '82 Proceedings of the fourteenth annual ACM symposium on Theory of computing
An efficient VLSI dictionary machine
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Dictionary machines with a small number of processors
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
A multiprocessor network suitable for single-chip VLSI implementation
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
A Regular Layout for Parallel Adders
IEEE Transactions on Computers
The Diogenes Approach to Testable Fault-Tolerant Arrays of Processors
IEEE Transactions on Computers
The VLSI Complexity of Sorting
IEEE Transactions on Computers
On approximating the ideal random access machine by physical machines
Journal of the ACM (JACM)
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