Information transfer and area-time tradeoffs for VLSI multiplication
Communications of the ACM
Introduction to VLSI Systems
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
STOC '79 Proceedings of the eleventh annual ACM symposium on Theory of computing
The chip complexity of binary arithmetic
STOC '80 Proceedings of the twelfth annual ACM symposium on Theory of computing
VLSI Architectures for multidimensional fourier transform processing
IEEE Transactions on Computers
A Mesh-Connected Area-Time Optimal VLSI Multiplier of Large Integers
IEEE Transactions on Computers
Optimal Bounds for Finding Maximum on Array of Processors with k Global Buses
IEEE Transactions on Computers
The VLSI Complexity of Sorting
IEEE Transactions on Computers
Energy-Privacy trade-offs in VLSI computations
INDOCRYPT'05 Proceedings of the 6th international conference on Cryptology in India
Cellular Automata: Energy Consumption and Physical Feasibility
Fundamenta Informaticae - Cellular Automata
New area-time lower bounds for the multidimensional DFT
CATS 2011 Proceedings of the Seventeenth Computing on The Australasian Theory Symposium - Volume 119
| Hi-index | 14.99 |
We introduce a property of Boolean functions, called transitivity which consists of integer, polynomial, and matrix products as well as of many interesting related computational problems. We show that the area of any circuit computing a transitive function grows quadratically with the circuit's maximum data rate, expressed in bits/S. This result provides a precise analytic expression of an area-time tradeoff for a wide class of VLSI circuits. Furthermore (as shown elsewhere), this tradeoff is achievable. We have thus matching (to within a constant multiplicative factor) upper and lower complexity bounds for the three above products, in the VLSI circuits computational model.