Information transfer and area-time tradeoffs for VLSI multiplication

Authors:
Harold Abelson;Peter Andreae
Affiliations:
Massachusetts Institute of Technology, Cambridge;Massachusetts Institute of Technology, Cambridge
Venue:
Communications of the ACM
Year:
1980

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Abstract

The need to transfer information between processing elements can be a major factor in determining the performance of a VLSI circuit. We show that communication considerations alone dictate that any VLSI design for computing the 2n-bit product of two n-bit integers must satisfy the constraint AT2 ≥ n2/64 where A is the area of the chip and T is the time required to perform the computation. This same tradeoff applies to circuits which can shift n-bit words through n different positions.