Sorting on a mesh-connected parallel computer
Communications of the ACM
The parallel execution of DO loops
Communications of the ACM
Communications of the ACM
Structure of Computers and Computations
Structure of Computers and Computations
Bitonic Sort on a Mesh-Connected Parallel Computer
IEEE Transactions on Computers
IEEE Transactions on Computers
IEEE Transactions on Computers
The VLSI Complexity of Sorting
IEEE Transactions on Computers
Computer
Algorithm and hardware for a merge sort using multiple processors
IBM Journal of Research and Development
A Note on the Linear Transformation Method for Systolic Array Design
IEEE Transactions on Computers
Parallel VLSI computation of all shortest paths in a graph
CSC '88 Proceedings of the 1988 ACM sixteenth annual conference on Computer science
HADI: Mining Radii of Large Graphs
ACM Transactions on Knowledge Discovery from Data (TKDD)
Hi-index | 14.98 |
In this correspondence we develop a parallel algorithm to compute the all-pairs shortest paths and the diameter of a given graph. Next, this algorithm is mapped into a suitable VLSI systolic architecture and the performance of this proposed VLSI implementation is evaluated.