Hardware sorter and its application to data base machine

  • Authors:
  • Yasunori Dohi;Akira Suzuki;Noriyuki Matsui

  • Affiliations:
  • Department of Computer Science, Carnegie-Mellon University;Fujitsu Limited Co.;Fujitsu Limited Co.

  • Venue:
  • ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
  • Year:
  • 1982

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Abstract

The main contribution of this paper is the design of a hardware sorter. This sorter is configured as a balanced, fixed binary tree of node units; the configuration of the sorter is independent of the length of data to be sorted. Each node unit can be realized on a single LSI chip. The logic of the hardware sorter design is heavily influenced by a specific, compressed, representation of sorted data. Using this hardware sorter and a few auxiliary functions based on the sorted property, we demonstrate the design of a relational data base machine.