Introduction to VLSI Systems
A unified approach to test data analysis
DAC '78 Proceedings of the 15th Design Automation Conference
An integrated CAD data base system
DAC '75 Proceedings of the 12th Design Automation Conference
An artwork design verification system
DAC '75 Proceedings of the 12th Design Automation Conference
Floss: An approach to automated layout for high-volume designs
DAC '77 Proceedings of the 14th Design Automation Conference
Fast algorithms for LSI artwork analysis
DAC '77 Proceedings of the 14th Design Automation Conference
A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
CRITIC - an integrated circuit design rule checking program
DAC '74 Proceedings of the 11th Design Automation Workshop
A simple computer-aided artwork system that works
DAC '74 Proceedings of the 11th Design Automation Workshop
Behavioral-level test development
DAC '79 Proceedings of the 16th Design Automation Conference
SABLE: A tool for generating structured, multi-level simulations
DAC '79 Proceedings of the 16th Design Automation Conference
17th design automation conference report June 23-25, 1980
ACM SIGDA Newsletter
A vertically organized computer-aided design data base
DAC '81 Proceedings of the 18th Design Automation Conference
A database approach for managing VLSI design data
DAC '82 Proceedings of the 19th Design Automation Conference
A symbolic design system for integrated circuits
DAC '82 Proceedings of the 19th Design Automation Conference
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This paper presents the author's opinion of the major problems confronting Design Automation for VLSI and how Design Automation may evolve to meet these challenges. The paper first takes a historical look at the driving forces for Design Automation development by analyzing the evolution of Design Automation at RCA. It looks at both some successful and unsuccessful development efforts and attempts to isolate some of the criteria necessary for success. It review RCA's current LSI Design Automation capabilities and compares them to the challenge of VLSI. The major challenges—layout, design verification and testability — are discussed along with possible achievable solutions.