PASCAL user manual and report
Multi-sim, a dynamic multi-level simulator
DAC '78 Proceedings of the 15th Design Automation Conference
A module level simulation technique for systems composed of LSI's and MSI's
DAC '78 Proceedings of the 15th Design Automation Conference
Functional simulation in the lamp system
DAC '76 Proceedings of the 13th Design Automation Conference
F/LOGIC - An interactive fault and logic simulator for digital circuits
DAC '76 Proceedings of the 13th Design Automation Conference
Proceedings of the Symposium on Design Automation and Microprocessors
Modeling and design description of hierarchical hardware/software systems
DAC '75 Proceedings of the 12th Design Automation Conference
Design validation in hierarchical systems
DAC '75 Proceedings of the 12th Design Automation Conference
Concurrent fault simulation and functional level modeling
DAC '77 Proceedings of the 14th Design Automation Conference
An hierarchical language for the structural description of digital systems
DAC '77 Proceedings of the 14th Design Automation Conference
SCALD: Structured Computer-Aided Logic Design
SCALD: Structured Computer-Aided Logic Design
A structural design language for computer aided design of digital systems
A structural design language for computer aided design of digital systems
An introduction to the DDL-P language
An introduction to the DDL-P language
Computer structures: Readings and examples (McGraw-Hill computer science series)
Computer structures: Readings and examples (McGraw-Hill computer science series)
SIMULA 67 common base language, (Norwegian Computing Center. Publication)
SIMULA 67 common base language, (Norwegian Computing Center. Publication)
A functional model of clocked microarchitectures
MICRO 22 Proceedings of the 22nd annual workshop on Microprogramming and microarchitecture
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Optimizing VHDL Compilation for Parallel Simulation
IEEE Design & Test
Three Decades of HDLs: Part II, Conlan Through Verilog
IEEE Design & Test
Symbolic simulation for functional verification with ADLIB and SDL
DAC '81 Proceedings of the 18th Design Automation Conference
Hierarchical design verification for large digital systems
DAC '81 Proceedings of the 18th Design Automation Conference
BOLT-a block oriented design specification language
DAC '81 Proceedings of the 18th Design Automation Conference
A CAD system for logic design based on frames and demons
DAC '81 Proceedings of the 18th Design Automation Conference
Process oriented logic simulation
DAC '81 Proceedings of the 18th Design Automation Conference
AIDE - a tool for computer architecture design
DAC '81 Proceedings of the 18th Design Automation Conference
The evolution of design automation to meet the challanges of VLSI
DAC '80 Proceedings of the 17th Design Automation Conference
The SLIDE simulator: A facility for the design and analysis of computer interconnections
DAC '80 Proceedings of the 17th Design Automation Conference
Automatic design with dependence graphs
DAC '80 Proceedings of the 17th Design Automation Conference
DAC '80 Proceedings of the 17th Design Automation Conference
MIXS: A mixed level simulator for large digital system logic verification
DAC '80 Proceedings of the 17th Design Automation Conference
The generation of simulator-based systems for microcode development
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
Defining and implementing a multilevel design representation with simulation applications
DAC '82 Proceedings of the 19th Design Automation Conference
DAC '82 Proceedings of the 19th Design Automation Conference
Digital logic modeling system based on MODLAN
DAC '82 Proceedings of the 19th Design Automation Conference
Design of Testable Structures Defined by Simple Loops
IEEE Transactions on Computers
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SABLE (Structure And Behavior Linking Environment) is a system currently being developed at Stanford to support structured, multi-level behavior specification and simulation of digital systems. SABLE accepts information about the nesting and interconnectivity of components, and combines it with descriptions of their behavior, which are written in a new language called ADLIB (A Design Language for Indicating Behavior). ADLIB allows users to define, the “data level” at which each component operates, and to specify mechanisms for translating information between these levels. The facilities provided by SABLE are general and flexible, making it feasible to simulate a large system at several levels of abstraction simultaneously. Examples are included that illustrate: the use of ADLIB for behavior specification, techniques for data level translations, and a design methodology that makes use of multi-level simulation.