A MOS/LSI oriented logic simulator
DAC '81 Proceedings of the 18th Design Automation Conference
A timing verification system based on extracted MOS/VLSI circuit parameters
DAC '81 Proceedings of the 18th Design Automation Conference
An automatic/interactive layout planning system for arbitrarily-sized rectangular building blocks
DAC '81 Proceedings of the 18th Design Automation Conference
SABLE: A tool for generating structured, multi-level simulations
DAC '79 Proceedings of the 16th Design Automation Conference
ACM Transactions on Programming Languages and Systems (TOPLAS)
A MOS/LSI oriented logic simulator
DAC '81 Proceedings of the 18th Design Automation Conference
A timing verification system based on extracted MOS/VLSI circuit parameters
DAC '81 Proceedings of the 18th Design Automation Conference
An automatic/interactive layout planning system for arbitrarily-sized rectangular building blocks
DAC '81 Proceedings of the 18th Design Automation Conference
ALI: A procedural language to describe VLSI layouts
DAC '82 Proceedings of the 19th Design Automation Conference
| Hi-index | 0.00 |
BOLT is a block-oriented MOS Integrated Circuit design language which relies heavily on macro, define, and parameter default features in order to simplify the design specification. A compiler generates block, logic, and transistor level equivalents used in an integrated CAD system including logic simulators, timing verification, place and route software and other packages. To handle the rapidly changing custom MOS/LSI environment the device types are defined externally to the compiler.