A three-port/three-access register file for concurrent processing and I/O communication in a RISC-like graphics engine

  • Authors:
  • M. L. Anido;D. J. Allerton;E. J. Zaluska

  • Affiliations:
  • Dept. of Electronics and Computer Science, University of Southampton, SO9 5NH, U. K.;Dept. of Electronics and Computer Science, University of Southampton, SO9 5NH, U. K.;Dept. of Electronics and Computer Science, University of Southampton, SO9 5NH, U. K.

  • Venue:
  • ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
  • Year:
  • 1989

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Abstract

A novel method that provides extremely fast Input/Output (I/O) data transfer to a RISC-like graphics engine is presented. This method employs a combined two-port / two-access and a three-port / three-access register file used for concurrent processing and I/O data transfer. The three-port cell employed is only 25 % larger than the two-port cell, offering considerable advantages over alternative approaches, such as FIFOs or register banks.This paper discusses some methods that can provide highly fast I/O data transfer in parallel with execution and focuses on the design and implementation of the CMOS-2um register file employed.Index Terms - Computer Architecture, Reduced Instruction Set Computers, VLSI Design, Computer Image Generation, Interprocessor Communication.