A Way to Build Efficient Carry-Skip Adders
IEEE Transactions on Computers
Transistor sizing in CMOS circuits
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Fast, small, and static combinatorial CMOS circuits
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
ACM Transactions on Graphics (TOG)
TRAM: A Design Methodology for High-Performance, Easily Testable, Multimegabit RAMs
IEEE Transactions on Computers
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
The Organization of Permutation Architectures with Bused Interconnections
IEEE Transactions on Computers
A methodology for hardware verification based on logic simulation
Journal of the ACM (JACM)
The Jitter Model for Metastability and its Application to Redundant Synchronizers
IEEE Transactions on Computers
IEEE Transactions on Computers
Analysis and design of latch-controlled synchronous digital circuits
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Fast Division Using Accurate Quotient Approximations to Reduce the Number of Iterations
IEEE Transactions on Computers - Special issue on computer arithmetic
Designing Optimum One-Level Carry-Skip Adders
IEEE Transactions on Computers
Evaluation of parts by mixed-level DC-connected components in logic simulation
DAC '93 Proceedings of the 30th international Design Automation Conference
Analysis of Gate Oxide Shorts in CMOS Circuits
IEEE Transactions on Computers
EURO-DAC '94 Proceedings of the conference on European design automation
Power optimal buffered clock tree design
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
The design and implementation of PowerMill
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
An estimation technique to guide low power resynthesis algorithms
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
A delay model for logic synthesis of continuously-sized networks
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Noise in deep submicron digital design
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Power analysis for sequential circuits at logic level
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Energy recovery for the design of high-speed, low-power static RAMs
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Effects of correlations on accuracy of power analysis—an experimental study
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Systematic Design of Fault-Tolerant Multiprocessors with Shared Buses
IEEE Transactions on Computers
Optimizing two-phase, level-clocked circuitry
Journal of the ACM (JACM)
Retiming gated-clocks and precharged circuit structures
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Latchup-aware placement and parasitic-bounded routing of custom analog cells
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Selection of Voltage Thresholds for Delay Measurement
Analog Integrated Circuits and Signal Processing - Special issue: analog design issues in digital VSLI circuits and systems
Tools and methodologies for low power design
DAC '97 Proceedings of the 34th annual Design Automation Conference
Design methodologies for noise in digital integrated circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
On average power dissipation and random pattern testability of CMOS combinational logic networks
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
IEEE Transactions on Computers
Retractile clock-powered logic
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Practical considerations of clock-powered logic
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Energy recovering static memory
Proceedings of the 2002 international symposium on Low power electronics and design
Compact models for estimating microprocessor frequency and power
Proceedings of the 2002 international symposium on Low power electronics and design
Quality technique transfer: Manufacturing and software
Annals of Software Engineering
IEEE Design & Test
Fast Power Estimation of Large Circuits
IEEE Design & Test
A Single Chip Parallel Multiplier by MOS Technology
IEEE Transactions on Computers
Accelerated Two-Level Carry-Skip Adders-A Type of Very Fast Adders
IEEE Transactions on Computers
A State Assignment Approach to Asynchronous CMOS Circuit Design
IEEE Transactions on Computers
High-Speed Microprogrammable Asynchronous Controller Modules
IEEE Transactions on Computers
Integration, the VLSI Journal
Reproducing Synchronization Bugs with Model Checking
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
A High-Speed DES Implementation for Network Applications
CRYPTO '92 Proceedings of the 12th Annual International Cryptology Conference on Advances in Cryptology
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Energy recovery for low-power CMOS
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Clock-Powered CMOS: A Hybrid Adiabatic Logic Style for Energy-Efficient Computing
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Shaping a VLSI Wire to Minimize Elmore Delay
EDTC '97 Proceedings of the 1997 European conference on Design and Test
A parallel Data Base Machine for query translation in a distributed database system
SAC '86 Proceedings of the 1986 workshop on Applied computing
The Design of A Digital IC for Thyristor Triggering
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Minimal length test vectors for multiple-fault detection
Theoretical Computer Science - Mathematical foundations of programming semantics
Ultralow-power adiabatic circuit semi-custom design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Nanoelectronic circuits and systems
Radial addressing of nanowires
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Power Estimation Under User-Specified Input Sequences and Programs
Integrated Computer-Aided Engineering
The organization of permutation architectures with bussed interconnections
SFCS '87 Proceedings of the 28th Annual Symposium on Foundations of Computer Science
Transistor sizing for large combinational digital CMOS circuits
Integration, the VLSI Journal
RTRAM: reconfigurable and testable multi-bit RAM design
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
Concurrent off-phase built-in self-test of dormant logic
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
An efficient EPI and energy consumption of 32 bit ALU using Shannon theorem based adder approach
WSEAS Transactions on Circuits and Systems
Proving Newtonian arbiters Correct, almost surely
DCC'96 Proceedings of the 3rd international conference on Designing Correct Circuits
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