The design and analysis of VLSI circuits
The design and analysis of VLSI circuits
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Transition density, a stochastic measure of activity in digital circuits
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Estimation of average switching activity in combinational and sequential circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Switching activity analysis considering spatiotemporal correlations
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Estimation of circuit activity considering signal correlations and simultaneous switching
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Improving the accuracy of circuit activity measurement
DAC '94 Proceedings of the 31st annual Design Automation Conference
EURO-DAC '94 Proceedings of the conference on European design automation
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Power analysis for sequential circuits at logic level
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Dependency preserving probabilistic modeling of switching activity using bayesian networks
Proceedings of the 38th annual Design Automation Conference
A fast and accurate delay dependent method for switching estimation of large combinational circuits
Journal of Systems Architecture: the EUROMICRO Journal
Switching Activity Estimation of Large Circuits using Multiple Bayesian Networks
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Switching activity estimation of VLSI circuits using Bayesian networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low Power VLSI Design Techniques - The Current State
Integrated Computer-Aided Engineering
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Decomposition-based vectorless toggle rate computation for FPGA circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Cascaded Bayesian inferencing for switching activity estimation with correlated inputs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A method for switching activity analysis of VHDL-RTL combinatorial circuits
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
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Logic-level circuit optimization for low power requires efficient estimation of the power consumed by the resulting circuit. In CMOS, the power consumption depends on the number of transitions occurring on the signals internal to a circuit. We introduce a new technique to estimate the transition probabilities for internal signals of combinational circuits. This technique uses Markov chains and the concept of reconvergence regions, and is efficiently implemented based on ROBDDs.The temporal dependence of each signal, multiple concurrent transitions and mutual dependence of internal signals are taken into account. Our technique provides an exact computation for small circuits and an approximate estimation for large circuits. Experimental results show the approximate estimation to be fast even for large circuits while only small inaccuracies appear.