A State Assignment Approach to Asynchronous CMOS Circuit Design

Authors:
V. Kantabutra;A. G. Andreou
Affiliations:
-;-
Venue:
IEEE Transactions on Computers
Year:
1994

Citing 6
Cited 0

The design and analysis of VLSI circuits

The design and analysis of VLSI circuits
BiCMOS/CMOS systems design

BiCMOS/CMOS systems design
Wiring considerations in analog VLSI systems, with application to field-programmable networks

Wiring considerations in analog VLSI systems, with application to field-programmable networks
A State Variable Assignment Method for Asynchronous Sequential Switching Circuits

Journal of the ACM (JACM)
Theory and Design Switching Circ

Theory and Design Switching Circ
Logic Minimization Algorithms for VLSI Synthesis

Logic Minimization Algorithms for VLSI Synthesis

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Abstract

Present a new algorithm for state assignment in asynchronous circuits so that for each circuit state transition, only one (secondary) state variable switches. No intermediate unstable states are used. The resultant circuits operate at optimum speed in terms of the number of transitions made and use only static CMOS gates. By reducing the number of switching events per state transition, noise due to the switching events is reduced and dynamic power dissipation may also be reduced. This approach is suitable for asynchronous sequential circuits that are designed from flow tables or state transition diagrams. The proposed approach may also be useful for designing synchronous circuits, but explorations into the subject of clock power would be necessary to determine its usefulness.