State assignment using a new embedding method based on an intersecting cube theory
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
An efficient critical race-free state assignment technique for asynchronous finite state machines
DAC '93 Proceedings of the 30th international Design Automation Conference
Race-Free State Assignments for Synthesizing Large-Scale Asynchronous Sequential Logic Circuits
IEEE Transactions on Computers
A State Assignment Approach to Asynchronous CMOS Circuit Design
IEEE Transactions on Computers
Hazards, Critical Races, and Metastability
IEEE Transactions on Computers
Synthesis of p-valued asynchronous sequential circuits by using a general clock function
MVL '76 Proceedings of the sixth international symposium on Multiple-valued logic
The Avoidance and Elimination of Function Hazards in Asynchronous Sequential Circuits
IEEE Transactions on Computers
Realization Methods for Asynchronous Sequential Circuits
IEEE Transactions on Computers
State Assignments for Asynchronous Sequential Machines
IEEE Transactions on Computers
Pulse Input Asynchronous Sequential Circuits
IEEE Transactions on Computers
Generation of Design Equations in Asynchronous Sequential Circuits
IEEE Transactions on Computers
Safe Asynchronous Sequential Circuits
IEEE Transactions on Computers
Universal Single Transition Time Asynchronous State Assignments
IEEE Transactions on Computers
A State Assignment Procedure for Asynchronous Sequential Circuits
IEEE Transactions on Computers
Separating and Completely Separating Systems and Linear Codes
IEEE Transactions on Computers
State Assignment Selection in Asynchronous Sequential Circuits
IEEE Transactions on Computers
Structural Simplification and Decomposition of Asynchronous Sequential Circuits
IEEE Transactions on Computers
IEEE Transactions on Computers
A Multicode Single Transition-Time State Assignment for Asynchronous Sequential Machines
IEEE Transactions on Computers
Synthesis of Multiple-Input Change Asynchronous Machines Using Controlled Excitation and Flip-Flops
IEEE Transactions on Computers
Design of Asynchronous Circuits Assuming Unbounded Gate Delays
IEEE Transactions on Computers
Fault-Tolerant Asynchronous Networks
IEEE Transactions on Computers
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