A State Variable Assignment Method for Asynchronous Sequential Switching Circuits
Journal of the ACM (JACM)
Algebraic structure theory of sequential machines (Prentice-Hall international series in applied mathematics)
The Avoidance and Elimination of Function Hazards in Asynchronous Sequential Circuits
IEEE Transactions on Computers
Generation of a Clock Pulse for Asynchronous Sequential Machines to Eliminate Critical Races
IEEE Transactions on Computers
Transition Logic Circuits and a Synthesis Method
IEEE Transactions on Computers
Realization Methods for Asynchronous Sequential Circuits
IEEE Transactions on Computers
State Assignments for Asynchronous Sequential Machines
IEEE Transactions on Computers
Synthesis of Asynchronous Sequential Circuits with Multiple-Input Changes
IEEE Transactions on Computers
Analysis and Synthesis of Asynchronous Sequential Networks Using Edge-Sensitive Flip-Flops
IEEE Transactions on Computers
Asynchronous Sequential Switching Circuits with Unrestricted Input Changes
IEEE Transactions on Computers
State Assignment of Asynchronous Sequential Machines Using Graph Techniques
IEEE Transactions on Computers
Self-Synchronizing Circuits and Nonfundamental Mode Operation
IEEE Transactions on Computers
Fail-Safe Asynchronous Machines with Multiple-Input Changes
IEEE Transactions on Computers
Theory and Design of Mixed-Mode Sequential Machines
IEEE Transactions on Computers
Stored State Asynchronous Sequential Circuits
IEEE Transactions on Computers
IEEE Transactions on Computers
Self-Synchronization of Asynchronous Sequential Circuits Employing a General Clock Function
IEEE Transactions on Computers
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A synthesis method for multiple-input change asynchronous sequential machines is proposed. The method is based on the self-synchronization principle. The internal states are realized with edge-sensitive flip-flops which are triggered selectively. The new concept of selective triggering or controlled excitation results in considerable saving in logic and more flexible design. The state assignment is arbitrary, and the number of state variables required can be made absolutely minimum. A detailed comparison of the speed of operation is made with one of the well-known methods of realization. It is found that our realization is, in general, as fast, and sometimes could be even faster.