Towards a Theory of Universal Speed-Independent Modules
IEEE Transactions on Computers
Self-Synchronizing Circuits and Nonfundamental Mode Operation
IEEE Transactions on Computers
IEEE Transactions on Computers
Theoretical and Experimental Behavior of Synchronizers Operating in the Metastable Region
IEEE Transactions on Computers
Equivalence of the Arbiter, the Synchronizer, the Latch, and the Inertial Delay
IEEE Transactions on Computers
IEEE Transactions on Computers
The Effect of Asynchronous Inputs on Sequential Network Reliability
IEEE Transactions on Computers
Synthesis of Multiple-Input Change Asynchronous Machines Using Controlled Excitation and Flip-Flops
IEEE Transactions on Computers
On the models for designing VLSI asynchronous digital systems
Integration, the VLSI Journal
General theory of metastable operation
IEEE Transactions on Computers
| Hi-index | 15.01 |
The problem of designing asynchronous circuits where the changes in binary input signals occur independently of one another is discussed. If several input changes occur within some interval d1, the circuit behaves as though the changes were simultaneous. If consecutive changes are spaced by intervals exceeding some longer interval d2 then the circuit reacts as though a sequence of single changes had occurred. But when the spacing is between these values, the system may react in an unsatisfactory manner unless special attention is paid to the problem during the design process. Constraints imposed by this problem on the row assignment and on the delay elements are derived.