Petri Net Theory and the Modeling of Systems
Petri Net Theory and the Modeling of Systems
Asynchronous Sequential Switching Circuits with Unrestricted Input Changes
IEEE Transactions on Computers
Design of Asynchronous Circuits Assuming Unbounded Gate Delays
IEEE Transactions on Computers
Asynchronous machines exhibiting concurrency
Record of the Project MAC conference on concurrent systems and parallel computation
Journal of Computer and System Sciences
Decomposition in Asynchronous Circuit Design
Concurrency and Hardware Design, Advances in Petri Nets
Timing analysis for synthesis of hardware interface controllers using timed signal transition graphs
PNPM '95 Proceedings of the Sixth International Workshop on Petri Nets and Performance Models
Improved Decomposition of Signal Transition Graphs
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
A Polynomial-Time Algorithm for Checking Consistency of Free-Choice Signal Transition Graphs
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'03)
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Designing asynchronous circuits in a large scale using the traditional approaches is impractical because it is difficult to control the relative delays of logic components. This problem is especially severe in VLSI circuits as one has even less control over the critical delays. We present two well-known traditional models for asynchronous circuits, namely, the Finite State Machines and Petri Nets, and discuss the reasons for their failure in VLSI applications. A new model for designing large asynchronous systems is briefly proposed and a practical design example is presented.