Modular Decomposition of Combinatorial Multiple-Values Circuits
IEEE Transactions on Computers
A Partial Scan Method for Sequential Circuits with Feedback
IEEE Transactions on Computers
An efficient critical race-free state assignment technique for asynchronous finite state machines
DAC '93 Proceedings of the 30th international Design Automation Conference
Verification of asynchronous interface circuits with bounded wire delays
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
A New Class of Sequential Circuits with Combinational Test Generation Complexity
IEEE Transactions on Computers
Isomorph-Redundancy in Sequential Circuits
IEEE Transactions on Computers
Logic Control and “Reactive” Systems: Algorithmization and Programming
Automation and Remote Control
A State Assignment Approach to Asynchronous CMOS Circuit Design
IEEE Transactions on Computers
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Parallel and serial decompositions of multi-valued sequential machines
MVL '78 Proceedings of the eighth international symposium on Multiple-valued logic
Algebraic analysis of nondeterministic behavior
DAC '80 Proceedings of the 17th Design Automation Conference
DAC '82 Proceedings of the 19th Design Automation Conference
Logical correctness by construction
DAC '82 Proceedings of the 19th Design Automation Conference
Design verification based on functional abstraction
DAC '79 Proceedings of the 16th Design Automation Conference
Representative Traces for Processor Models with Infinite Cache
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
One-way trap door functions based on the Boolean satisfiability problem
ICCC '02 Proceedings of the 15th international conference on Computer communication
Universal Modular Trees: A Design Procedure
IEEE Transactions on Computers
Totally Preset Checking Experiments for Sequential Machines
IEEE Transactions on Computers
Sequential Network Design Using Extra Inputs for Fault Detection
IEEE Transactions on Computers
Theory and Design of Mixed-Mode Sequential Machines
IEEE Transactions on Computers
A Multicode Single Transition-Time State Assignment for Asynchronous Sequential Machines
IEEE Transactions on Computers
On Modular Networks Satisfying the Shift-Register Rule
IEEE Transactions on Computers
Logical models of the transportation network of a plant with progressive operations
Automation and Remote Control
Built-in test for CMOS circuits
ITC'84 Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production
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