Logic testing and design for testability
Logic testing and design for testability
The Ballast Methodology for Structured Partial Scan Design
IEEE Transactions on Computers
A Partial Scan Method for Sequential Circuits with Feedback
IEEE Transactions on Computers
DAC '93 Proceedings of the 30th international Design Automation Conference
Design of testable sequential circuits by repositioning flip-flops
Journal of Electronic Testing: Theory and Applications - Special issue on partial scan methods
Theory and Design Switching Circ
Theory and Design Switching Circ
Software transformations for sequential test generation
ATS '95 Proceedings of the 4th Asian Test Symposium
Sequential Test Generation Based on Circuit Pseudo-Transformation
ATS '97 Proceedings of the 6th Asian Test Symposium
Sequential Circuits with combinational Test Generation Complexity
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Behavior and testability preservation under the retiming transformation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Sequential Circuits with Combinational Test Generation Complexity under Single-Fault Assumption
Journal of Electronic Testing: Theory and Applications
Combinational Test Generation for Various Classes of Acyclic Sequential Circuits
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Proceedings of the 41st annual Design Automation Conference
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
IEEE Transactions on Computers
Analysis of Test Generation Complexity for Stuck-At and Path Delay Faults Based on τk-Notation
IEICE - Transactions on Information and Systems
Autoscan: a scan design without external scan inputs or outputs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hi-index | 14.98 |
We introduce a new class of sequential circuits with combinational test generation complexity which we call internally balanced structures. It is shown that sequential circuits can be classified by their structure as follows: {sequential circuits of acyclic structure} 驴 {sequential circuits of internally balanced structure} 驴 {sequential circuits of balanced structure} and that internally balanced structures allow test generation with combinational test generation complexity. On the other hand, if finite state machines (FSMs) are classified by their realization possibility, it can be shown that {FSMs which can be realized as a sequential circuit of acyclic structure} = {FSMs which can be realized as a sequential circuit of internally balanced structure} 驴 {FSMs which can be realized as a sequential circuit of balanced structure}. Hence, any FSM realizable with acyclic structure can be also realized with internally balanced structure which allows test generation with combinational test generation complexity. In addition, we discuss the definition of test generation possibility with combinational test generation complexity and introduce a new definition which covers the previous narrow definition. Finally, we study applications to design for testability based on the partial scan and to test generation time reduction for sequential circuits in general, using characteristics of the internally balanced structures. The experimental results shows the effectiveness of this approach.