Non-scan design-for-testability techniques for sequential circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
FIRE: a fault-independent combinational redundancy identification algorithm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A New Class of Sequential Circuits with Combinational Test Generation Complexity
IEEE Transactions on Computers
Low-cost sequential ATPG with clock-control DFT
Proceedings of the 39th annual Design Automation Conference
Classification of Faults in Synchronous Sequential Circuits
IEEE Transactions on Computers
On Selecting Flip-Flops for Partial Reset
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Too much delay fault coverage is a bad thing
Proceedings of the IEEE International Test Conference 2001
Testable design of non-scan sequential circuits using extra logic
ATS '95 Proceedings of the 4th Asian Test Symposium
Non-Scan Design for Testability for Synchronous Sequential Circuits Based on Conflict Analysis
ITC '00 Proceedings of the 2000 IEEE International Test Conference
On Finding Undetectable and Redundant Faults in Synchronous Sequential Circuits
ICCD '98 Proceedings of the International Conference on Computer Design
ICCD '03 Proceedings of the 21st International Conference on Computer Design
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Scan Design Using Standard Flip-Flops
IEEE Design & Test
Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional Logic
IEEE Transactions on Computers
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Design-for-testability (DFT) techniques used for synchronous sequential circuits allow redundant faults, which do not affect the functional operation of the circuit, to be detected after DFT insertion. Detecting such faults can cause a chip that operates correctly to be discarded as faulty. A solution proposed earlier was to mask output values where redundant faults are detected in the circuit with DFT, without masking other faults, which should continue to be detected. We investigate a complementary issue of generating test sets that require as little masking as possible. Our goal is to generate a test set that does not detect any redundant faults (or detects as few redundant faults as possible), such that no output values (or as few output values as possible) would have to be masked. We discuss the relationship of this problem to fault dominance. We then describe a specific procedure based on test selection for deriving test sets that detect as few redundant faults as possible while detecting all the other detectable faults.