The design and analysis of VLSI circuits
The design and analysis of VLSI circuits
Newtonian arbiters cannot be proven correct
Formal Methods in System Design - Special issue on designing correct circuits
Specifying and Verifying Requirements of Real-Time Systems
IEEE Transactions on Software Engineering
Algorithmic Analysis of Nonlinear Hybrid Systems
Proceedings of the 7th International Conference on Computer Aided Verification
Anomalous Behavior of Synchronizer and Arbiter Circuits
IEEE Transactions on Computers
Timing Analysis of Combinational Circuits in Intuitionistic Propositional Logic
Formal Methods in System Design
Reachability Analysis Using Polygonal Projections
HSCC '99 Proceedings of the Second International Workshop on Hybrid Systems: Computation and Control
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
ATVA '09 Proceedings of the 7th International Symposium on Automated Technology for Verification and Analysis
| Hi-index | 0.00 |
This paper presents the verification of safety and liveness for two arbiters modeled with differential equations. The first is a "toy" arbiter, whose model was chosen for its tractability; the second is Seitz's nMOS arbiter, chosen as an example of a widely used and studied design. Because an arbiter cannot be guaranteed to respond correctly in any boundedamount of time, we verify liveness in an almost surely sense--with probability 1, the arbiter eventually grants some pending request. Our analysis is more general than previously published results in that we allow the inputs of the arbiter to vary while the arbiter is in the metastable region, and we give conditions that ensure liveness even in the presence of such variations.