Performance Analysis of Asynchronous Circuits Using Markov Chains
Concurrency and Hardware Design, Advances in Petri Nets
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Efficient Self-Timed Interfaces for Crossing Clock Domains
ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems
Fourteen Ways to Fool Your Synchronizer
ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems
Interfacing Synchronous and Asynchronous Modules Within a High-Speed Pipeline
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
Metastability in Asynchronous Wait-Free Protocols
IEEE Transactions on Computers
Proceedings of the 44th annual Design Automation Conference
ACM Turing award lectures
The choice uncertainty principle
Communications of the ACM
A Survey and Taxonomy of GALS Design Styles
IEEE Design & Test
Towards a Theory of Universal Speed-Independent Modules
IEEE Transactions on Computers
Comments on "The Anomalous Behavior of Flip-Flops in Synchronizer Circuits"
IEEE Transactions on Computers
IEEE Transactions on Computers
Synchronization and Matching in Redundant Systems
IEEE Transactions on Computers
Theoretical and Experimental Behavior of Synchronizers Operating in the Metastable Region
IEEE Transactions on Computers
Equivalence of the Arbiter, the Synchronizer, the Latch, and the Inertial Delay
IEEE Transactions on Computers
Pin Limitations and Partitioning of VLSI Interconnection Networks
IEEE Transactions on Computers
The Effect of Asynchronous Inputs on Sequential Network Reliability
IEEE Transactions on Computers
Direct Implementation of Asynchronous Control Units
IEEE Transactions on Computers
A New J-K Flip-Flop for Synchronizers
IEEE Transactions on Computers
Meeting points: using thread criticality to adapt multicore hardware to parallel regions
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
Asynchronous speed-independent arbiter in a form of a hardware control module
AFIPS '76 Proceedings of the June 7-10, 1976, national computer conference and exposition
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Synchronization and Arbitration in GALS
Electronic Notes in Theoretical Computer Science (ENTCS)
Anomalous Response Times of Input Synchronizers
IEEE Transactions on Computers
A modeling and simulation methodology for analyzing ATM network vulnerabilities
Computer Communications
ATVA '09 Proceedings of the 7th International Symposium on Automated Technology for Verification and Analysis
ACM Transactions on Architecture and Code Optimization (TACO)
General theory of metastable operation
IEEE Transactions on Computers
IEEE Transactions on Computers
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Proving Newtonian arbiters Correct, almost surely
DCC'96 Proceedings of the 3rd international conference on Designing Correct Circuits
| Hi-index | 15.04 |
Observations are shown of oscillatory and metastable behavior of flip-flops in response to logically undefined input conditions such as those that occur in synchronizers and arbiters. Significant systems failures have resulted from this fundamentally inescapable problem that is generally not appreciated by system designers and users.